qemu-patch-raspberry4/hw/ppc/mac.h
Peter Maydell 83234b8289 hw/ppc/mac.h: Remove MAX_CPUS macro
The mac.h header defines a MAX_CPUS macro. This is confusingly named,
because it suggests it's a generic setting, but in fact it's used
by only the g3beige and mac99 machines. It's also using a single
macro for two values which aren't inherently the same -- if one
of these two machines was updated to support SMP configurations
then it would want a different max_cpus value to the other.

Since the macro is used in only two places, just expand it out
and get rid of it. If hypothetical future work to support SMP
in these boards needs a compile-time-known limit on the number
of CPUs, we can give it a suitable name at that point.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211105184216.120972-1-peter.maydell@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:12 +01:00

106 lines
3.2 KiB
C

/*
* QEMU PowerMac emulation shared definitions and prototypes
*
* Copyright (c) 2004-2007 Fabrice Bellard
* Copyright (c) 2007 Jocelyn Mayer
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef PPC_MAC_H
#define PPC_MAC_H
#include "qemu/units.h"
#include "exec/memory.h"
#include "hw/boards.h"
#include "hw/sysbus.h"
#include "hw/input/adb.h"
#include "hw/misc/mos6522.h"
#include "hw/pci/pci_host.h"
#include "hw/pci-host/uninorth.h"
#include "qom/object.h"
#define NVRAM_SIZE 0x2000
#define PROM_FILENAME "openbios-ppc"
#define KERNEL_LOAD_ADDR 0x01000000
#define KERNEL_GAP 0x00100000
#define ESCC_CLOCK 3686400
/* Old World IRQs */
#define OLDWORLD_CUDA_IRQ 0x12
#define OLDWORLD_ESCCB_IRQ 0x10
#define OLDWORLD_ESCCA_IRQ 0xf
#define OLDWORLD_IDE0_IRQ 0xd
#define OLDWORLD_IDE0_DMA_IRQ 0x2
#define OLDWORLD_IDE1_IRQ 0xe
#define OLDWORLD_IDE1_DMA_IRQ 0x3
/* New World IRQs */
#define NEWWORLD_CUDA_IRQ 0x19
#define NEWWORLD_PMU_IRQ 0x19
#define NEWWORLD_ESCCB_IRQ 0x24
#define NEWWORLD_ESCCA_IRQ 0x25
#define NEWWORLD_IDE0_IRQ 0xd
#define NEWWORLD_IDE0_DMA_IRQ 0x2
#define NEWWORLD_IDE1_IRQ 0xe
#define NEWWORLD_IDE1_DMA_IRQ 0x3
#define NEWWORLD_EXTING_GPIO1 0x2f
#define NEWWORLD_EXTING_GPIO9 0x37
/* Core99 machine */
#define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99")
typedef struct Core99MachineState Core99MachineState;
DECLARE_INSTANCE_CHECKER(Core99MachineState, CORE99_MACHINE,
TYPE_CORE99_MACHINE)
#define CORE99_VIA_CONFIG_CUDA 0x0
#define CORE99_VIA_CONFIG_PMU 0x1
#define CORE99_VIA_CONFIG_PMU_ADB 0x2
struct Core99MachineState {
/*< private >*/
MachineState parent;
uint8_t via_config;
};
/* Grackle PCI */
#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
/* Mac NVRAM */
#define TYPE_MACIO_NVRAM "macio-nvram"
OBJECT_DECLARE_SIMPLE_TYPE(MacIONVRAMState, MACIO_NVRAM)
struct MacIONVRAMState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
uint32_t size;
uint32_t it_shift;
MemoryRegion mem;
uint8_t *data;
};
void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
#endif /* PPC_MAC_H */