33d68b5f00
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
98 lines
2.7 KiB
C
98 lines
2.7 KiB
C
/*
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* MIPS emulation for qemu: CPU initialisation routines.
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*
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* Copyright (c) 2004-2005 Jocelyn Mayer
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* Copyright (c) 2007 Herve Poussineau
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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struct mips_def_t {
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const unsigned char *name;
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int32_t CP0_PRid;
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int32_t CP0_Config0;
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int32_t CP0_Config1;
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};
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/*****************************************************************************/
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/* MIPS CPU definitions */
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static mips_def_t mips_defs[] =
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{
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#ifndef MIPS_HAS_MIPS64
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{
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.name = "4Kc",
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.CP0_PRid = 0x00018000,
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.CP0_Config0 = MIPS_CONFIG0,
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.CP0_Config1 = MIPS_CONFIG1,
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},
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{
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.name = "4KEc",
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.CP0_PRid = 0x00018400,
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.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR),
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.CP0_Config1 = MIPS_CONFIG1,
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},
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{
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.name = "24Kf",
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.CP0_PRid = 0x00019300,
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.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR),
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.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP),
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},
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#else
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{
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.name = "R4000",
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.CP0_PRid = 0x00000400,
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.CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT),
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.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP),
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},
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#endif
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};
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int mips_find_by_name (const unsigned char *name, mips_def_t **def)
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{
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int i, ret;
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ret = -1;
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*def = NULL;
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for (i = 0; i < sizeof(mips_defs) / sizeof(mips_defs[0]); i++) {
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if (strcasecmp(name, mips_defs[i].name) == 0) {
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*def = &mips_defs[i];
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ret = 0;
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break;
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}
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}
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return ret;
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}
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void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
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{
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int i;
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for (i = 0; i < sizeof(mips_defs) / sizeof(mips_defs[0]); i++) {
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(*cpu_fprintf)(f, "MIPS '%s'\n",
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mips_defs[i].name);
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}
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}
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int cpu_mips_register (CPUMIPSState *env, mips_def_t *def)
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{
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if (!def)
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cpu_abort(env, "Unable to find MIPS CPU definition\n");
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env->CP0_PRid = def->CP0_PRid;
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env->CP0_Config0 = def->CP0_Config0;
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env->CP0_Config1 = def->CP0_Config1;
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return 0;
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}
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