Aurelien Jarno 34257c2117 target/sh4: trap unaligned accesses ... SH4 requires that memory accesses are naturally aligned, except for the SH4-A movua.l instructions which can do unaligned loads. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2017-05-13 11:18:27 +02:00
..
alpha	qemu-timer: do not include sysemu/cpus.h from util/qemu-timer.h	2017-03-14 13:28:18 +01:00
arm	arm: Remove workarounds for old M-profile exception return implementation	2017-04-20 17:39:17 +01:00
cris	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
hppa	hppa: avoid anonymous unions in designated initializers.	2017-03-04 12:52:01 +00:00
i386	hax: Fix memory mapping de-duplication logic	2017-05-05 12:10:00 +02:00
lm32	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
m68k	This is the same as the v3 posted except a re-base and a few extra signoffs	2017-01-16 18:23:02 +00:00
microblaze	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
mips	target/mips: fix delay slot detection in gen_msa_branch()	2017-03-20 11:19:14 +00:00
moxie	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
nios2	target/nios2: take BQL around interrupt check	2017-03-14 13:26:37 +01:00
openrisc	target/openrisc: Support non-busy idle state using PMR SPR	2017-05-04 09:39:14 +09:00
ppc	target/ppc: Style fixes	2017-04-26 12:41:56 +10:00
s390x	qobject: Use simpler QDict/QList scalar insertion macros	2017-05-09 09:13:51 +02:00
sh4	target/sh4: trap unaligned accesses	2017-05-13 11:18:27 +02:00
sparc	sparc/sparc64: grab BQL before calling cpu_check_irqs	2017-03-09 10:41:38 +00:00
tilegx	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
tricore	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
unicore32	cputlb: drop flush_global flag from tlb_flush	2017-01-13 14:24:37 +00:00
xtensa	target/xtensa fixes for 2.9:	2017-03-18 17:24:49 +00:00