343bd85a40
Now that the ESCC device is instantiated directly via qdev, move it to within the macio device and wire up the IRQs and memory regions using the sysbus API. This enables to remove the now-obsolete escc_mem parameter to the macio_init() function. (Note this patch also contains small touch-ups to the formatting in macio_escc_legacy_setup() and ppc_heathrow_init() in order to keep checkpatch happy) Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
118 lines
3.5 KiB
C
118 lines
3.5 KiB
C
/*
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* QEMU PowerMac emulation shared definitions and prototypes
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef PPC_MAC_H
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#define PPC_MAC_H
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#include "exec/memory.h"
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#include "hw/sysbus.h"
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#include "hw/ide/internal.h"
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#include "hw/input/adb.h"
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#include "hw/misc/mos6522.h"
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/* SMP is not enabled, for now */
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#define MAX_CPUS 1
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#define BIOS_SIZE (1024 * 1024)
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#define NVRAM_SIZE 0x2000
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#define PROM_FILENAME "openbios-ppc"
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#define PROM_ADDR 0xfff00000
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#define KERNEL_LOAD_ADDR 0x01000000
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#define KERNEL_GAP 0x00100000
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#define ESCC_CLOCK 3686400
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/* MacIO */
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#define TYPE_OLDWORLD_MACIO "macio-oldworld"
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#define TYPE_NEWWORLD_MACIO "macio-newworld"
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#define TYPE_MACIO_IDE "macio-ide"
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#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
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typedef struct MACIOIDEState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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uint32_t channel;
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qemu_irq real_ide_irq;
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qemu_irq real_dma_irq;
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qemu_irq ide_irq;
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qemu_irq dma_irq;
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MemoryRegion mem;
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IDEBus bus;
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IDEDMA dma;
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void *dbdma;
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bool dma_active;
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uint32_t timing_reg;
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uint32_t irq_reg;
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} MACIOIDEState;
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void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
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void macio_ide_register_dma(MACIOIDEState *ide);
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void macio_init(PCIDevice *dev,
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MemoryRegion *pic_mem);
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/* Heathrow PIC */
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qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
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int nb_cpus, qemu_irq **irqs);
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/* Grackle PCI */
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#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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/* UniNorth PCI */
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PCIBus *pci_pmac_init(qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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PCIBus *pci_pmac_u3_init(qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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/* Mac NVRAM */
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#define TYPE_MACIO_NVRAM "macio-nvram"
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#define MACIO_NVRAM(obj) \
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OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM)
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typedef struct MacIONVRAMState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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uint32_t size;
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uint32_t it_shift;
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MemoryRegion mem;
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uint8_t *data;
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} MacIONVRAMState;
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void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
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#endif /* PPC_MAC_H */
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