dd73185b7d
Implement a model of the Serial Communication Controller (SCC) found in MPS2 FPGA images. The primary purpose of this device is to communicate with the Motherboard Configuration Controller (MCC) which is located on the MPS board itself, outside the FPGA image. This is used for programming the MPS clock generators. The SCC also has some basic ID registers and an output for the board LEDs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-7-git-send-email-peter.maydell@linaro.org
44 lines
881 B
C
44 lines
881 B
C
/*
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* ARM MPS2 SCC emulation
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*
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* Copyright (c) 2017 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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#ifndef MPS2_SCC_H
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#define MPS2_SCC_H
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#include "hw/sysbus.h"
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#define TYPE_MPS2_SCC "mps2-scc"
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#define MPS2_SCC(obj) OBJECT_CHECK(MPS2SCC, (obj), TYPE_MPS2_SCC)
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#define NUM_OSCCLK 3
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typedef struct {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t cfg0;
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uint32_t cfg1;
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uint32_t cfg4;
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uint32_t cfgdata_rtn;
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uint32_t cfgdata_out;
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uint32_t cfgctrl;
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uint32_t cfgstat;
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uint32_t dll;
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uint32_t aid;
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uint32_t id;
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uint32_t oscclk[NUM_OSCCLK];
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uint32_t oscclk_reset[NUM_OSCCLK];
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} MPS2SCC;
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#endif
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