df8abbbadf
The monitor modes table is found by experimenting with the Monitors Control Panel in MacOS and analysing the reads/writes. From this it can be found that the mode is controlled by writes to the DAFB_MODE_CTRL1 and DAFB_MODE_CTRL2 registers. Implement the first block of DAFB registers as a register array including the existing sense register, the newly discovered control registers above, and also the DAFB_MODE_VADDR1 and DAFB_MODE_VADDR2 registers which are used by NetBSD to determine the current video mode. These experiments also show that the offset of the start of video RAM and the stride can change depending upon the monitor mode, so update macfb_draw_graphic() and both the BI_MAC_VADDR and BI_MAC_VROW bootinfo for the q800 machine accordingly. Finally update macfb_common_realize() so that only the resolution and depth supported by the display type can be specified on the command line, and add an error hint showing the list of supported resolutions and depths if the user tries to specify an invalid display mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
177 lines
12 KiB
Plaintext
177 lines
12 KiB
Plaintext
# See docs/devel/tracing.rst for syntax documentation.
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# jazz_led.c
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jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
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jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
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# xenfb.c
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xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs 0x%x abs %d"
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xenfb_key_event(void *opaque, int scancode, int button_state) "%p scancode %d bs 0x%x"
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xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d"
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# g364fb.c
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g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
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g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
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# vmware_vga.c
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vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
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vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
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vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
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vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
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vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
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vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
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vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
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# virtio-gpu-base.c
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virtio_gpu_features(bool virgl) "virgl %d"
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# virtio-gpu-3d.c
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# virtio-gpu.c
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virtio_gpu_cmd_get_display_info(void) ""
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virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d"
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virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
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virtio_gpu_cmd_set_scanout_blob(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
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virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"
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virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
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virtio_gpu_cmd_res_create_blob(uint32_t res, uint64_t size) "res 0x%x, size %" PRId64
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virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x"
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virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x"
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virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x"
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virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x"
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virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x"
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virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x"
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virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
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virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s"
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virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x"
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virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
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virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
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virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d"
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virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x"
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virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x"
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virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64
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# qxl.c
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disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
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disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
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qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=0x%" PRIx64 " %u,%u"
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qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
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qxl_destroy_primary(int qid) "%d"
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qxl_enter_vga_mode(int qid) "%d"
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qxl_exit_vga_mode(int qid) "%d"
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qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64
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qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
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qxl_interface_attach_worker(int qid) "%d"
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qxl_interface_get_init_info(int qid) "%d"
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qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
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qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
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qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
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qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
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qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
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qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
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qxl_io_log(int qid, const char *log_buf) "%d %s"
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qxl_io_read_unexpected(int qid) "%d"
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qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
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qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d"
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qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
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qxl_post_load(int qid, const char *mode) "%d %s"
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qxl_pre_load(int qid) "%d"
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qxl_pre_save(int qid) "%d"
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qxl_reset_surfaces(int qid) "%d"
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qxl_ring_command_check(int qid, const char *mode) "%d %s"
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qxl_ring_command_get(int qid, const char *mode) "%d %s"
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qxl_ring_command_req_notification(int qid) "%d"
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qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
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qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
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qxl_ring_cursor_req_notification(int qid) "%d"
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qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
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qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
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qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
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qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
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qxl_soft_reset(int qid) "%d"
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qxl_spice_destroy_surfaces_complete(int qid) "%d"
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qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
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qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
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qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
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qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
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qxl_spice_monitors_config(int qid) "%d"
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qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
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qxl_spice_oom(int qid) "%d"
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qxl_spice_reset_cursor(int qid) "%d"
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qxl_spice_reset_image_cache(int qid) "%d"
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qxl_spice_reset_memslots(int qid) "%d"
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qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
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qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
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qxl_surfaces_dirty(int qid, uint64_t offset, uint64_t size) "%d offset=0x%"PRIx64" size=0x%"PRIx64
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qxl_send_events(int qid, uint32_t events) "%d %d"
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qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
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qxl_set_guest_bug(int qid) "%d"
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qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
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qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d 0x%X %p"
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qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
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qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
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qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
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qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
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# qxl-render.c
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qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
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qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
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qxl_render_update_area_done(void *cookie) "%p"
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# vga.c
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vga_std_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
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vga_std_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
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vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x, val 0x%x"
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vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x"
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# cirrus_vga.c
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vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
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vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
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vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x"
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vga_cirrus_write_gr(uint8_t index, uint8_t val) "GR addr 0x%02x, val 0x%02x"
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vga_cirrus_bitblt_start(uint8_t blt_rop, uint8_t blt_mode, uint8_t blt_modeext, int blt_width, int blt_height, int blt_dstpitch, int blt_srcpitch, uint32_t blt_dstaddr, uint32_t blt_srcaddr, uint8_t gr_val) "rop=0x%02x mode=0x%02x modeext=0x%02x w=%d h=%d dpitch=%d spitch=%d daddr=0x%08"PRIx32" saddr=0x%08"PRIx32" writemask=0x%02x"
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# sii9022.c
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sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
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sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
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sii9022_switch_mode(const char *mode) "mode: %s"
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# ati.c
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ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s -> 0x%"PRIx64
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ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s <- 0x%"PRIx64
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# artist.c
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artist_reg_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 "%s -> 0x%"PRIx64
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artist_reg_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 "%s <- 0x%"PRIx64
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artist_vram_read(unsigned int size, uint64_t addr, int posx, int posy, uint64_t val) "%u 0x%"PRIx64 " %ux%u-> 0x%"PRIx64
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artist_vram_write(unsigned int size, uint64_t addr, uint64_t val) "%u 0x%"PRIx64 " <- 0x%"PRIx64
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artist_fill_window(unsigned int start_x, unsigned int start_y, unsigned int width, unsigned int height, uint32_t op, uint32_t ctlpln) "start=%ux%u length=%ux%u op=0x%08x ctlpln=0x%08x"
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artist_block_move(unsigned int start_x, unsigned int start_y, unsigned int dest_x, unsigned int dest_y, unsigned int width, unsigned int height) "source %ux%u -> dest %ux%u size %ux%u"
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artist_draw_line(unsigned int start_x, unsigned int start_y, unsigned int end_x, unsigned int end_y) "%ux%u %ux%u"
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# cg3.c
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cg3_read(uint32_t addr, uint32_t val, unsigned size) "read addr:0x%06"PRIx32" val:0x%08"PRIx32" size:%u"
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cg3_write(uint32_t addr, uint32_t val, unsigned size) "write addr:0x%06"PRIx32" val:0x%08"PRIx32" size:%u"
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# dpcd.c
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dpcd_read(uint32_t addr, uint8_t val) "read addr:0x%"PRIx32" val:0x%02x"
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dpcd_write(uint32_t addr, uint8_t val) "write addr:0x%"PRIx32" val:0x%02x"
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# sm501.c
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sm501_system_config_read(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_system_config_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_i2c_read(uint32_t addr, uint8_t val) "addr=0x%x, val=0x%x"
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sm501_i2c_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_palette_read(uint32_t addr) "addr=0x%x"
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sm501_palette_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_disp_ctrl_read(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_disp_ctrl_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_2d_engine_read(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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sm501_2d_engine_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
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# macfb.c
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macfb_ctrl_read(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%"PRIx64 " value 0x%"PRIx64 " size %u"
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macfb_ctrl_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%"PRIx64 " value 0x%"PRIx64 " size %u"
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macfb_sense_read(uint32_t value) "video sense: 0x%"PRIx32
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macfb_sense_write(uint32_t value) "video sense: 0x%"PRIx32
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macfb_update_mode(uint32_t width, uint32_t height, uint8_t depth) "setting mode to width %"PRId32 " height %"PRId32 " size %d"
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