qemu-patch-raspberry4/target
Max Filippov 3a3c9dc4ca target-xtensa: implement RER/WER instructions
RER and WER are privileged instructions for accessing external
registers. External register address space is local to processor core.
There's no alignment requirements, addressable units are 32-bit wide
registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-16 19:19:03 -08:00
..
alpha
arm
cris
i386 x86: implement la57 paging mode 2016-12-22 16:01:04 +01:00
lm32
m68k
microblaze
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openrisc
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sh4
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tilegx
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unicore32
xtensa target-xtensa: implement RER/WER instructions 2017-01-16 19:19:03 -08:00