The MPS2 AN505 FPGA image includes a "FPGA control block" which is a small set of registers handling LEDs, buttons and some counters. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-14-peter.maydell@linaro.org
44 lines
986 B
C
44 lines
986 B
C
/*
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* ARM MPS2 FPGAIO emulation
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*
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* Copyright (c) 2018 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/* This is a model of the FPGAIO register block in the AN505
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* FPGA image for the MPS2 dev board; it is documented in the
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* application note:
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* http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html
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*
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* QEMU interface:
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* + sysbus MMIO region 0: the register bank
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*/
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#ifndef MPS2_FPGAIO_H
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#define MPS2_FPGAIO_H
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#include "hw/sysbus.h"
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#define TYPE_MPS2_FPGAIO "mps2-fpgaio"
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#define MPS2_FPGAIO(obj) OBJECT_CHECK(MPS2FPGAIO, (obj), TYPE_MPS2_FPGAIO)
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typedef struct {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t led0;
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uint32_t prescale;
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uint32_t misc;
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uint32_t prescale_clk;
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} MPS2FPGAIO;
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#endif
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