Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
228 lines
6.6 KiB
C
228 lines
6.6 KiB
C
/*
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* QEMU System Emulator, accelerator interfaces
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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* Copyright (c) 2014 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "sysemu/accel.h"
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#include "sysemu/tcg.h"
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#include "qom/object.h"
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#include "cpu.h"
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#include "sysemu/cpus.h"
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#include "qemu/main-loop.h"
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#include "tcg/tcg.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "hw/boards.h"
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#include "qapi/qapi-builtin-visit.h"
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struct TCGState {
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AccelState parent_obj;
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bool mttcg_enabled;
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unsigned long tb_size;
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};
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typedef struct TCGState TCGState;
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#define TYPE_TCG_ACCEL ACCEL_CLASS_NAME("tcg")
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DECLARE_INSTANCE_CHECKER(TCGState, TCG_STATE,
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TYPE_TCG_ACCEL)
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/* mask must never be zero, except for A20 change call */
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static void tcg_handle_interrupt(CPUState *cpu, int mask)
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{
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int old_mask;
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g_assert(qemu_mutex_iothread_locked());
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old_mask = cpu->interrupt_request;
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cpu->interrupt_request |= mask;
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/*
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* If called from iothread context, wake the target cpu in
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* case its halted.
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*/
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if (!qemu_cpu_is_self(cpu)) {
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qemu_cpu_kick(cpu);
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} else {
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atomic_set(&cpu_neg(cpu)->icount_decr.u16.high, -1);
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if (use_icount &&
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!cpu->can_do_io
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&& (mask & ~old_mask) != 0) {
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cpu_abort(cpu, "Raised interrupt while not in I/O function");
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}
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}
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}
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/*
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* We default to false if we know other options have been enabled
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* which are currently incompatible with MTTCG. Otherwise when each
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* guest (target) has been updated to support:
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* - atomic instructions
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* - memory ordering primitives (barriers)
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* they can set the appropriate CONFIG flags in ${target}-softmmu.mak
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*
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* Once a guest architecture has been converted to the new primitives
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* there are two remaining limitations to check.
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*
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* - The guest can't be oversized (e.g. 64 bit guest on 32 bit host)
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* - The host must have a stronger memory order than the guest
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*
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* It may be possible in future to support strong guests on weak hosts
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* but that will require tagging all load/stores in a guest with their
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* implicit memory order requirements which would likely slow things
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* down a lot.
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*/
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static bool check_tcg_memory_orders_compatible(void)
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{
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#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO)
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return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0;
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#else
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return false;
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#endif
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}
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static bool default_mttcg_enabled(void)
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{
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if (use_icount || TCG_OVERSIZED_GUEST) {
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return false;
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} else {
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#ifdef TARGET_SUPPORTS_MTTCG
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return check_tcg_memory_orders_compatible();
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#else
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return false;
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#endif
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}
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}
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static void tcg_accel_instance_init(Object *obj)
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{
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TCGState *s = TCG_STATE(obj);
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s->mttcg_enabled = default_mttcg_enabled();
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}
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static int tcg_init(MachineState *ms)
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{
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TCGState *s = TCG_STATE(current_accel());
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tcg_exec_init(s->tb_size * 1024 * 1024);
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cpu_interrupt_handler = tcg_handle_interrupt;
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mttcg_enabled = s->mttcg_enabled;
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return 0;
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}
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static char *tcg_get_thread(Object *obj, Error **errp)
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{
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TCGState *s = TCG_STATE(obj);
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return g_strdup(s->mttcg_enabled ? "multi" : "single");
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}
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static void tcg_set_thread(Object *obj, const char *value, Error **errp)
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{
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TCGState *s = TCG_STATE(obj);
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if (strcmp(value, "multi") == 0) {
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if (TCG_OVERSIZED_GUEST) {
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error_setg(errp, "No MTTCG when guest word size > hosts");
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} else if (use_icount) {
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error_setg(errp, "No MTTCG when icount is enabled");
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} else {
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#ifndef TARGET_SUPPORTS_MTTCG
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warn_report("Guest not yet converted to MTTCG - "
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"you may get unexpected results");
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#endif
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if (!check_tcg_memory_orders_compatible()) {
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warn_report("Guest expects a stronger memory ordering "
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"than the host provides");
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error_printf("This may cause strange/hard to debug errors\n");
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}
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s->mttcg_enabled = true;
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}
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} else if (strcmp(value, "single") == 0) {
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s->mttcg_enabled = false;
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} else {
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error_setg(errp, "Invalid 'thread' setting %s", value);
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}
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}
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static void tcg_get_tb_size(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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TCGState *s = TCG_STATE(obj);
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uint32_t value = s->tb_size;
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visit_type_uint32(v, name, &value, errp);
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}
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static void tcg_set_tb_size(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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TCGState *s = TCG_STATE(obj);
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uint32_t value;
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if (!visit_type_uint32(v, name, &value, errp)) {
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return;
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}
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s->tb_size = value;
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}
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static void tcg_accel_class_init(ObjectClass *oc, void *data)
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{
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AccelClass *ac = ACCEL_CLASS(oc);
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ac->name = "tcg";
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ac->init_machine = tcg_init;
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ac->allowed = &tcg_allowed;
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object_class_property_add_str(oc, "thread",
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tcg_get_thread,
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tcg_set_thread);
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object_class_property_add(oc, "tb-size", "int",
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tcg_get_tb_size, tcg_set_tb_size,
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NULL, NULL);
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object_class_property_set_description(oc, "tb-size",
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"TCG translation block cache size");
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}
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static const TypeInfo tcg_accel_type = {
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.name = TYPE_TCG_ACCEL,
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.parent = TYPE_ACCEL,
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.instance_init = tcg_accel_instance_init,
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.class_init = tcg_accel_class_init,
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.instance_size = sizeof(TCGState),
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};
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static void register_accel_types(void)
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{
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type_register_static(&tcg_accel_type);
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}
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type_init(register_accel_types);
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