In BE32 mode, sub-word size watchpoints can fail to trigger because the address of the access is adjusted in the opcode helpers before being compared with the watchpoint registers. This patch reverses the address adjustment before performing the comparison with the help of a new CPUClass hook. This version of the patch augments and tidies up comments a little. Signed-off-by: Julian Brown <julian@codesourcery.com> Message-id: caaf64ffc72f6ae183015337b7afdbd4b8989cb6.1484929304.git.julian@codesourcery.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
451 lines
12 KiB
C
451 lines
12 KiB
C
/*
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* QEMU CPU model
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*
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* Copyright (c) 2012-2014 SUSE LINUX Products GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "qom/cpu.h"
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#include "sysemu/hw_accel.h"
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#include "qemu/notify.h"
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#include "qemu/log.h"
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#include "exec/log.h"
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#include "qemu/error-report.h"
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#include "sysemu/sysemu.h"
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#include "hw/qdev-properties.h"
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#include "trace-root.h"
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bool cpu_exists(int64_t id)
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{
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CPUState *cpu;
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CPU_FOREACH(cpu) {
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (cc->get_arch_id(cpu) == id) {
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return true;
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}
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}
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return false;
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}
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CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
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{
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char *str, *name, *featurestr;
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CPUState *cpu = NULL;
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ObjectClass *oc;
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CPUClass *cc;
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Error *err = NULL;
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str = g_strdup(cpu_model);
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name = strtok(str, ",");
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oc = cpu_class_by_name(typename, name);
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if (oc == NULL) {
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g_free(str);
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return NULL;
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}
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cc = CPU_CLASS(oc);
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featurestr = strtok(NULL, ",");
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/* TODO: all callers of cpu_generic_init() need to be converted to
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* call parse_features() only once, before calling cpu_generic_init().
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*/
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cc->parse_features(object_class_get_name(oc), featurestr, &err);
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g_free(str);
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if (err != NULL) {
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goto out;
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}
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cpu = CPU(object_new(object_class_get_name(oc)));
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object_property_set_bool(OBJECT(cpu), true, "realized", &err);
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out:
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if (err != NULL) {
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error_report_err(err);
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object_unref(OBJECT(cpu));
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return NULL;
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}
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return cpu;
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}
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bool cpu_paging_enabled(const CPUState *cpu)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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return cc->get_paging_enabled(cpu);
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}
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static bool cpu_common_get_paging_enabled(const CPUState *cpu)
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{
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return false;
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}
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void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
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Error **errp)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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cc->get_memory_mapping(cpu, list, errp);
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}
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static void cpu_common_get_memory_mapping(CPUState *cpu,
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MemoryMappingList *list,
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Error **errp)
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{
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error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
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}
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void cpu_reset_interrupt(CPUState *cpu, int mask)
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{
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cpu->interrupt_request &= ~mask;
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}
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void cpu_exit(CPUState *cpu)
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{
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atomic_set(&cpu->exit_request, 1);
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/* Ensure cpu_exec will see the exit request after TCG has exited. */
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smp_wmb();
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atomic_set(&cpu->tcg_exit_req, 1);
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}
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int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
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void *opaque)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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return (*cc->write_elf32_qemunote)(f, cpu, opaque);
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}
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static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
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CPUState *cpu, void *opaque)
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{
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return 0;
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}
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int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
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int cpuid, void *opaque)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
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}
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static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
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CPUState *cpu, int cpuid,
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void *opaque)
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{
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return -1;
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}
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int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
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void *opaque)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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return (*cc->write_elf64_qemunote)(f, cpu, opaque);
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}
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static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
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CPUState *cpu, void *opaque)
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{
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return 0;
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}
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int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
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int cpuid, void *opaque)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
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}
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static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
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CPUState *cpu, int cpuid,
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void *opaque)
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{
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return -1;
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}
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static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
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{
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return 0;
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}
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static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
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{
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return 0;
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}
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static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
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{
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/* If no extra check is required, QEMU watchpoint match can be considered
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* as an architectural match.
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*/
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return true;
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}
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bool target_words_bigendian(void);
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static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
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{
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return target_words_bigendian();
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}
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static void cpu_common_noop(CPUState *cpu)
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{
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}
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static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
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{
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return false;
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}
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void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (cc->dump_state) {
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cpu_synchronize_state(cpu);
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cc->dump_state(cpu, f, cpu_fprintf, flags);
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}
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}
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void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
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int flags)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (cc->dump_statistics) {
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cc->dump_statistics(cpu, f, cpu_fprintf, flags);
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}
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}
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void cpu_reset(CPUState *cpu)
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{
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CPUClass *klass = CPU_GET_CLASS(cpu);
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if (klass->reset != NULL) {
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(*klass->reset)(cpu);
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}
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trace_guest_cpu_reset(cpu);
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}
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static void cpu_common_reset(CPUState *cpu)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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int i;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
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log_cpu_state(cpu, cc->reset_dump_flags);
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}
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cpu->interrupt_request = 0;
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cpu->halted = 0;
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cpu->mem_io_pc = 0;
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cpu->mem_io_vaddr = 0;
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cpu->icount_extra = 0;
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cpu->icount_decr.u32 = 0;
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cpu->can_do_io = 1;
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cpu->exception_index = -1;
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cpu->crash_occurred = false;
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if (tcg_enabled()) {
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for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) {
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atomic_set(&cpu->tb_jmp_cache[i], NULL);
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}
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#ifdef CONFIG_SOFTMMU
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tlb_flush(cpu, 0);
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#endif
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}
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}
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static bool cpu_common_has_work(CPUState *cs)
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{
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return false;
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}
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ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
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{
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CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
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return cc->class_by_name(cpu_model);
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}
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static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
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{
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return NULL;
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}
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static void cpu_common_parse_features(const char *typename, char *features,
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Error **errp)
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{
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char *featurestr; /* Single "key=value" string being parsed */
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char *val;
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static bool cpu_globals_initialized;
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/* TODO: all callers of ->parse_features() need to be changed to
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* call it only once, so we can remove this check (or change it
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* to assert(!cpu_globals_initialized).
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* Current callers of ->parse_features() are:
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* - cpu_generic_init()
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*/
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if (cpu_globals_initialized) {
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return;
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}
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cpu_globals_initialized = true;
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featurestr = features ? strtok(features, ",") : NULL;
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while (featurestr) {
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val = strchr(featurestr, '=');
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if (val) {
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GlobalProperty *prop = g_new0(typeof(*prop), 1);
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*val = 0;
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val++;
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prop->driver = typename;
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prop->property = g_strdup(featurestr);
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prop->value = g_strdup(val);
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prop->errp = &error_fatal;
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qdev_prop_register_global(prop);
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} else {
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error_setg(errp, "Expected key=value format, found %s.",
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featurestr);
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return;
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}
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featurestr = strtok(NULL, ",");
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}
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}
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static void cpu_common_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cpu = CPU(dev);
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if (dev->hotplugged) {
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cpu_synchronize_post_init(cpu);
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cpu_resume(cpu);
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}
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/* NOTE: latest generic point where the cpu is fully realized */
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trace_init_vcpu(cpu);
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}
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static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cpu = CPU(dev);
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/* NOTE: latest generic point before the cpu is fully unrealized */
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trace_fini_vcpu(cpu);
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cpu_exec_unrealizefn(cpu);
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}
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static void cpu_common_initfn(Object *obj)
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{
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CPUState *cpu = CPU(obj);
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CPUClass *cc = CPU_GET_CLASS(obj);
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cpu->cpu_index = UNASSIGNED_CPU_INDEX;
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cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
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/* *-user doesn't have configurable SMP topology */
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/* the default value is changed by qemu_init_vcpu() for softmmu */
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cpu->nr_cores = 1;
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cpu->nr_threads = 1;
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qemu_mutex_init(&cpu->work_mutex);
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QTAILQ_INIT(&cpu->breakpoints);
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QTAILQ_INIT(&cpu->watchpoints);
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cpu->trace_dstate = bitmap_new(trace_get_vcpu_event_count());
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cpu_exec_initfn(cpu);
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}
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static void cpu_common_finalize(Object *obj)
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{
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CPUState *cpu = CPU(obj);
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g_free(cpu->trace_dstate);
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}
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static int64_t cpu_common_get_arch_id(CPUState *cpu)
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{
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return cpu->cpu_index;
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}
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static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
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{
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return addr;
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}
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static void cpu_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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CPUClass *k = CPU_CLASS(klass);
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k->class_by_name = cpu_common_class_by_name;
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k->parse_features = cpu_common_parse_features;
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k->reset = cpu_common_reset;
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k->get_arch_id = cpu_common_get_arch_id;
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k->has_work = cpu_common_has_work;
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k->get_paging_enabled = cpu_common_get_paging_enabled;
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k->get_memory_mapping = cpu_common_get_memory_mapping;
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k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
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k->write_elf32_note = cpu_common_write_elf32_note;
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k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
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k->write_elf64_note = cpu_common_write_elf64_note;
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k->gdb_read_register = cpu_common_gdb_read_register;
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k->gdb_write_register = cpu_common_gdb_write_register;
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k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
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k->debug_excp_handler = cpu_common_noop;
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k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
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k->cpu_exec_enter = cpu_common_noop;
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k->cpu_exec_exit = cpu_common_noop;
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k->cpu_exec_interrupt = cpu_common_exec_interrupt;
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k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
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set_bit(DEVICE_CATEGORY_CPU, dc->categories);
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dc->realize = cpu_common_realizefn;
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dc->unrealize = cpu_common_unrealizefn;
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/*
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* Reason: CPUs still need special care by board code: wiring up
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* IRQs, adding reset handlers, halting non-first CPUs, ...
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*/
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dc->cannot_instantiate_with_device_add_yet = true;
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}
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static const TypeInfo cpu_type_info = {
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.name = TYPE_CPU,
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.parent = TYPE_DEVICE,
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.instance_size = sizeof(CPUState),
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.instance_init = cpu_common_initfn,
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.instance_finalize = cpu_common_finalize,
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.abstract = true,
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.class_size = sizeof(CPUClass),
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.class_init = cpu_class_init,
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};
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static void cpu_register_types(void)
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{
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type_register_static(&cpu_type_info);
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}
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type_init(cpu_register_types)
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