git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1661 c046a42c-6fe2-441c-8c8c-71466251a162
226 lines
5.8 KiB
C
226 lines
5.8 KiB
C
/*
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* ARM helper routines
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*
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* Copyright (c) 2005 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h"
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void raise_exception(int tt)
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{
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env->exception_index = tt;
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cpu_loop_exit();
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}
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/* thread support */
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spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
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void cpu_lock(void)
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{
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spin_lock(&global_cpu_lock);
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}
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void cpu_unlock(void)
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{
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spin_unlock(&global_cpu_lock);
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}
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/* VFP support. */
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void do_vfp_abss(void)
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{
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FT0s = float32_abs(FT0s);
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}
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void do_vfp_absd(void)
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{
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FT0d = float64_abs(FT0d);
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}
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void do_vfp_sqrts(void)
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{
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FT0s = float32_sqrt(FT0s, &env->vfp.fp_status);
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}
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void do_vfp_sqrtd(void)
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{
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FT0d = float64_sqrt(FT0d, &env->vfp.fp_status);
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}
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/* XXX: check quiet/signaling case */
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#define DO_VFP_cmp(p, size) \
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void do_vfp_cmp##p(void) \
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{ \
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uint32_t flags; \
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switch(float ## size ## _compare_quiet(FT0##p, FT1##p, &env->vfp.fp_status)) {\
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case 0: flags = 0x6; break;\
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case -1: flags = 0x8; break;\
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case 1: flags = 0x2; break;\
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default: case 2: flags = 0x3; break;\
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}\
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env->vfp.fpscr = (flags << 28) | (env->vfp.fpscr & 0x0fffffff); \
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FORCE_RET(); \
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}\
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\
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void do_vfp_cmpe##p(void) \
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{ \
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uint32_t flags; \
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switch(float ## size ## _compare(FT0##p, FT1##p, &env->vfp.fp_status)) {\
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case 0: flags = 0x6; break;\
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case -1: flags = 0x8; break;\
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case 1: flags = 0x2; break;\
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default: case 2: flags = 0x3; break;\
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}\
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env->vfp.fpscr = (flags << 28) | (env->vfp.fpscr & 0x0fffffff); \
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FORCE_RET(); \
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}
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DO_VFP_cmp(s, 32)
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DO_VFP_cmp(d, 64)
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#undef DO_VFP_cmp
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/* Convert host exception flags to vfp form. */
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static inline int vfp_exceptbits_from_host(int host_bits)
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{
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int target_bits = 0;
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if (host_bits & float_flag_invalid)
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target_bits |= 1;
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if (host_bits & float_flag_divbyzero)
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target_bits |= 2;
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if (host_bits & float_flag_overflow)
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target_bits |= 4;
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if (host_bits & float_flag_underflow)
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target_bits |= 8;
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if (host_bits & float_flag_inexact)
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target_bits |= 0x10;
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return target_bits;
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}
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/* Convert vfp exception flags to target form. */
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static inline int vfp_exceptbits_to_host(int target_bits)
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{
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int host_bits = 0;
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if (target_bits & 1)
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host_bits |= float_flag_invalid;
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if (target_bits & 2)
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host_bits |= float_flag_divbyzero;
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if (target_bits & 4)
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host_bits |= float_flag_overflow;
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if (target_bits & 8)
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host_bits |= float_flag_underflow;
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if (target_bits & 0x10)
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host_bits |= float_flag_inexact;
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return host_bits;
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}
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void do_vfp_set_fpscr(void)
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{
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int i;
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uint32_t changed;
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changed = env->vfp.fpscr;
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env->vfp.fpscr = (T0 & 0xffc8ffff);
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env->vfp.vec_len = (T0 >> 16) & 7;
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env->vfp.vec_stride = (T0 >> 20) & 3;
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changed ^= T0;
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if (changed & (3 << 22)) {
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i = (T0 >> 22) & 3;
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switch (i) {
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case 0:
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i = float_round_nearest_even;
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break;
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case 1:
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i = float_round_up;
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break;
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case 2:
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i = float_round_down;
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break;
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case 3:
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i = float_round_to_zero;
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break;
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}
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set_float_rounding_mode(i, &env->vfp.fp_status);
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}
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i = vfp_exceptbits_to_host((T0 >> 8) & 0x1f);
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set_float_exception_flags(i, &env->vfp.fp_status);
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/* XXX: FZ and DN are not implemented. */
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}
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void do_vfp_get_fpscr(void)
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{
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int i;
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T0 = (env->vfp.fpscr & 0xffc8ffff) | (env->vfp.vec_len << 16)
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| (env->vfp.vec_stride << 20);
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i = get_float_exception_flags(&env->vfp.fp_status);
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T0 |= vfp_exceptbits_from_host(i);
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}
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#if !defined(CONFIG_USER_ONLY)
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#define MMUSUFFIX _mmu
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#define GETPC() (__builtin_return_address(0))
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
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{
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TranslationBlock *tb;
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CPUState *saved_env;
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target_phys_addr_t pc;
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int ret;
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/* XXX: hack to restore env in all cases, even if not called from
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generated code */
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saved_env = env;
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env = cpu_single_env;
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ret = cpu_arm_handle_mmu_fault(env, addr, is_write, is_user, 1);
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if (__builtin_expect(ret, 0)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (target_phys_addr_t)retaddr;
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tb = tb_find_pc(pc);
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if (tb) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, pc, NULL);
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}
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}
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raise_exception(env->exception_index);
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}
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env = saved_env;
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}
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#endif
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