haraldwolff/qemu-patch-raspberry4
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Eduardo Habkost 40e80ee411 i386/kvm: Blacklist TSX on known broken hosts 
Some Intel CPUs are known to have a broken TSX implementation. A
microcode update from Intel disabled TSX on those CPUs, but
GET_SUPPORTED_CPUID might be reporting it as supported if the
hosts were not updated yet.

Manually fixup the GET_SUPPORTED_CPUID data to ensure we will
never enable TSX when running on those hosts.

Reference:
* glibc commit 2702856bf45c82cf8e69f2064f5aa15c0ceb6359:
  https://sourceware.org/git/?p=glibc.git;a=commit;h=2702856bf45c82cf8e69f2064f5aa15c0ceb6359

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20170309181212.18864-3-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-03-10 15:01:08 -03:00
..
alpha target/alpha: Enable MTTCG by default 2017-02-28 11:41:46 +11:00
arm KVM: do not use sigtimedwait to catch SIGBUS 2017-03-03 16:40:02 +01:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
hppa hppa: avoid anonymous unions in designated initializers. 2017-03-04 12:52:01 +00:00
i386 i386/kvm: Blacklist TSX on known broken hosts 2017-03-10 15:01:08 -03:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
microblaze cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mips KVM: do not use sigtimedwait to catch SIGBUS 2017-03-03 16:40:02 +01:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
nios2 nios2: avoid anonymous unions in designated initializers. 2017-03-04 14:05:48 +00:00
openrisc target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
ppc target/ppc: use helper for excp handling 2017-03-06 13:17:28 +11:00
s390x qapi: Drop unused non-strict qobject input visitor 2017-03-05 09:14:19 +01:00
sh4 monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
sparc target/sparc: Restore ldstub of odd asis 2017-03-02 06:52:43 +11:00
tilegx qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa target/xtensa: add two missing headers to core import script 2017-02-23 10:50:56 -08:00