refactoring of cpus.c continues with cpu timer state extraction. cpu-timers: responsible for the softmmu cpu timers state, including cpu clocks and ticks. icount: counts the TCG instructions executed. As such it is specific to the TCG accelerator. Therefore, it is built only under CONFIG_TCG. One complication is due to qtest, which uses an icount field to warp time as part of qtest (qtest_clock_warp). In order to solve this problem, provide a separate counter for qtest. This requires fixing assumptions scattered in the code that qtest_enabled() implies icount_enabled(), checking each specific case. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [remove redundant initialization with qemu_spice_init] Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [fix lingering calls to icount_get] Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
449 lines
13 KiB
C
449 lines
13 KiB
C
/*
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* General purpose implementation of a simple periodic countdown timer.
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*
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* Copyright (c) 2007 CodeSourcery.
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*
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* This code is licensed under the GNU LGPL.
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*/
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#include "qemu/osdep.h"
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#include "hw/ptimer.h"
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#include "migration/vmstate.h"
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#include "qemu/host-utils.h"
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#include "sysemu/replay.h"
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#include "sysemu/cpu-timers.h"
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#include "sysemu/qtest.h"
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#include "block/aio.h"
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#include "sysemu/cpus.h"
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#define DELTA_ADJUST 1
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#define DELTA_NO_ADJUST -1
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struct ptimer_state
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{
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uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot. */
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uint64_t limit;
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uint64_t delta;
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uint32_t period_frac;
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int64_t period;
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int64_t last_event;
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int64_t next_event;
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uint8_t policy_mask;
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QEMUTimer *timer;
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ptimer_cb callback;
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void *callback_opaque;
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/*
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* These track whether we're in a transaction block, and if we
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* need to do a timer reload when the block finishes. They don't
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* need to be migrated because migration can never happen in the
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* middle of a transaction block.
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*/
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bool in_transaction;
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bool need_reload;
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};
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/* Use a bottom-half routine to avoid reentrancy issues. */
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static void ptimer_trigger(ptimer_state *s)
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{
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s->callback(s->callback_opaque);
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}
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static void ptimer_reload(ptimer_state *s, int delta_adjust)
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{
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uint32_t period_frac;
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uint64_t period;
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uint64_t delta;
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bool suppress_trigger = false;
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/*
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* Note that if delta_adjust is 0 then we must be here because of
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* a count register write or timer start, not because of timer expiry.
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* In that case the policy might require us to suppress the timer trigger
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* that we would otherwise generate for a zero delta.
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*/
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if (delta_adjust == 0 &&
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(s->policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT)) {
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suppress_trigger = true;
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}
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if (s->delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)
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&& !suppress_trigger) {
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ptimer_trigger(s);
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}
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/*
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* Note that ptimer_trigger() might call the device callback function,
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* which can then modify timer state, so we must not cache any fields
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* from ptimer_state until after we have called it.
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*/
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delta = s->delta;
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period = s->period;
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period_frac = s->period_frac;
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if (delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) {
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delta = s->delta = s->limit;
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}
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if (s->period == 0) {
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if (!qtest_enabled()) {
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fprintf(stderr, "Timer with period zero, disabling\n");
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}
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timer_del(s->timer);
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s->enabled = 0;
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return;
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}
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if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) {
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if (delta_adjust != DELTA_NO_ADJUST) {
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delta += delta_adjust;
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}
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}
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if (delta == 0 && (s->policy_mask & PTIMER_POLICY_CONTINUOUS_TRIGGER)) {
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if (s->enabled == 1 && s->limit == 0) {
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delta = 1;
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}
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}
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if (delta == 0 && (s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) {
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if (delta_adjust != DELTA_NO_ADJUST) {
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delta = 1;
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}
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}
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if (delta == 0 && (s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) {
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if (s->enabled == 1 && s->limit != 0) {
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delta = 1;
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}
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}
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if (delta == 0) {
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if (!qtest_enabled()) {
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fprintf(stderr, "Timer with delta zero, disabling\n");
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}
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timer_del(s->timer);
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s->enabled = 0;
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return;
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}
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/*
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* Artificially limit timeout rate to something
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* achievable under QEMU. Otherwise, QEMU spends all
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* its time generating timer interrupts, and there
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* is no forward progress.
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* About ten microseconds is the fastest that really works
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* on the current generation of host machines.
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*/
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if (s->enabled == 1 && (delta * period < 10000) &&
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!icount_enabled() && !qtest_enabled()) {
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period = 10000 / delta;
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period_frac = 0;
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}
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s->last_event = s->next_event;
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s->next_event = s->last_event + delta * period;
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if (period_frac) {
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s->next_event += ((int64_t)period_frac * delta) >> 32;
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}
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timer_mod(s->timer, s->next_event);
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}
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static void ptimer_tick(void *opaque)
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{
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ptimer_state *s = (ptimer_state *)opaque;
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bool trigger = true;
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/*
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* We perform all the tick actions within a begin/commit block
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* because the callback function that ptimer_trigger() calls
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* might make calls into the ptimer APIs that provoke another
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* trigger, and we want that to cause the callback function
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* to be called iteratively, not recursively.
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*/
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ptimer_transaction_begin(s);
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if (s->enabled == 2) {
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s->delta = 0;
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s->enabled = 0;
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} else {
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int delta_adjust = DELTA_ADJUST;
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if (s->delta == 0 || s->limit == 0) {
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/* If a "continuous trigger" policy is not used and limit == 0,
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we should error out. delta == 0 means that this tick is
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caused by a "no immediate reload" policy, so it shouldn't
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be adjusted. */
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delta_adjust = DELTA_NO_ADJUST;
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}
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if (!(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) {
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/* Avoid re-trigger on deferred reload if "no immediate trigger"
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policy isn't used. */
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trigger = (delta_adjust == DELTA_ADJUST);
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}
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s->delta = s->limit;
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ptimer_reload(s, delta_adjust);
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}
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if (trigger) {
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ptimer_trigger(s);
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}
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ptimer_transaction_commit(s);
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}
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uint64_t ptimer_get_count(ptimer_state *s)
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{
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uint64_t counter;
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if (s->enabled && s->delta != 0) {
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int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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int64_t next = s->next_event;
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int64_t last = s->last_event;
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bool expired = (now - next >= 0);
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bool oneshot = (s->enabled == 2);
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/* Figure out the current counter value. */
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if (expired) {
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/* Prevent timer underflowing if it should already have
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triggered. */
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counter = 0;
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} else {
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uint64_t rem;
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uint64_t div;
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int clz1, clz2;
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int shift;
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uint32_t period_frac = s->period_frac;
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uint64_t period = s->period;
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if (!oneshot && (s->delta * period < 10000) &&
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!icount_enabled() && !qtest_enabled()) {
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period = 10000 / s->delta;
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period_frac = 0;
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}
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/* We need to divide time by period, where time is stored in
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rem (64-bit integer) and period is stored in period/period_frac
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(64.32 fixed point).
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Doing full precision division is hard, so scale values and
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do a 64-bit division. The result should be rounded down,
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so that the rounding error never causes the timer to go
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backwards.
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*/
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rem = next - now;
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div = period;
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clz1 = clz64(rem);
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clz2 = clz64(div);
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shift = clz1 < clz2 ? clz1 : clz2;
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rem <<= shift;
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div <<= shift;
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if (shift >= 32) {
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div |= ((uint64_t)period_frac << (shift - 32));
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} else {
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if (shift != 0)
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div |= (period_frac >> (32 - shift));
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/* Look at remaining bits of period_frac and round div up if
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necessary. */
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if ((uint32_t)(period_frac << shift))
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div += 1;
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}
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counter = rem / div;
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if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) {
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/* Before wrapping around, timer should stay with counter = 0
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for a one period. */
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if (!oneshot && s->delta == s->limit) {
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if (now == last) {
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/* Counter == delta here, check whether it was
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adjusted and if it was, then right now it is
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that "one period". */
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if (counter == s->limit + DELTA_ADJUST) {
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return 0;
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}
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} else if (counter == s->limit) {
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/* Since the counter is rounded down and now != last,
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the counter == limit means that delta was adjusted
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by +1 and right now it is that adjusted period. */
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return 0;
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}
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}
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}
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}
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if (s->policy_mask & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN) {
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/* If now == last then delta == limit, i.e. the counter already
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represents the correct value. It would be rounded down a 1ns
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later. */
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if (now != last) {
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counter += 1;
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}
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}
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} else {
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counter = s->delta;
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}
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return counter;
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}
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void ptimer_set_count(ptimer_state *s, uint64_t count)
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{
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assert(s->in_transaction);
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s->delta = count;
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if (s->enabled) {
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s->need_reload = true;
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}
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}
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void ptimer_run(ptimer_state *s, int oneshot)
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{
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bool was_disabled = !s->enabled;
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assert(s->in_transaction);
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if (was_disabled && s->period == 0) {
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if (!qtest_enabled()) {
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fprintf(stderr, "Timer with period zero, disabling\n");
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}
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return;
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}
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s->enabled = oneshot ? 2 : 1;
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if (was_disabled) {
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s->need_reload = true;
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}
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}
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/* Pause a timer. Note that this may cause it to "lose" time, even if it
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is immediately restarted. */
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void ptimer_stop(ptimer_state *s)
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{
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assert(s->in_transaction);
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if (!s->enabled)
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return;
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s->delta = ptimer_get_count(s);
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timer_del(s->timer);
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s->enabled = 0;
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s->need_reload = false;
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}
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/* Set counter increment interval in nanoseconds. */
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void ptimer_set_period(ptimer_state *s, int64_t period)
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{
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assert(s->in_transaction);
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s->delta = ptimer_get_count(s);
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s->period = period;
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s->period_frac = 0;
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if (s->enabled) {
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s->need_reload = true;
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}
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}
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/* Set counter frequency in Hz. */
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void ptimer_set_freq(ptimer_state *s, uint32_t freq)
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{
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assert(s->in_transaction);
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s->delta = ptimer_get_count(s);
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s->period = 1000000000ll / freq;
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s->period_frac = (1000000000ll << 32) / freq;
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if (s->enabled) {
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s->need_reload = true;
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}
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}
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/* Set the initial countdown value. If reload is nonzero then also set
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count = limit. */
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void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload)
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{
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assert(s->in_transaction);
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s->limit = limit;
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if (reload)
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s->delta = limit;
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if (s->enabled && reload) {
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s->need_reload = true;
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}
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}
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uint64_t ptimer_get_limit(ptimer_state *s)
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{
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return s->limit;
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}
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void ptimer_transaction_begin(ptimer_state *s)
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{
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assert(!s->in_transaction);
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s->in_transaction = true;
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s->need_reload = false;
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}
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void ptimer_transaction_commit(ptimer_state *s)
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{
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assert(s->in_transaction);
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/*
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* We must loop here because ptimer_reload() can call the callback
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* function, which might then update ptimer state in a way that
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* means we need to do another reload and possibly another callback.
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* A disabled timer never needs reloading (and if we don't check
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* this then we loop forever if ptimer_reload() disables the timer).
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*/
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while (s->need_reload && s->enabled) {
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s->need_reload = false;
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s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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ptimer_reload(s, 0);
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}
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/* Now we've finished reload we can leave the transaction block. */
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s->in_transaction = false;
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}
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const VMStateDescription vmstate_ptimer = {
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.name = "ptimer",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8(enabled, ptimer_state),
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VMSTATE_UINT64(limit, ptimer_state),
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VMSTATE_UINT64(delta, ptimer_state),
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VMSTATE_UINT32(period_frac, ptimer_state),
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VMSTATE_INT64(period, ptimer_state),
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VMSTATE_INT64(last_event, ptimer_state),
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VMSTATE_INT64(next_event, ptimer_state),
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VMSTATE_TIMER_PTR(timer, ptimer_state),
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VMSTATE_END_OF_LIST()
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}
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};
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ptimer_state *ptimer_init(ptimer_cb callback, void *callback_opaque,
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uint8_t policy_mask)
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{
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ptimer_state *s;
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/* The callback function is mandatory. */
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assert(callback);
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s = g_new0(ptimer_state, 1);
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s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s);
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s->policy_mask = policy_mask;
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s->callback = callback;
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s->callback_opaque = callback_opaque;
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/*
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* These two policies are incompatible -- trigger-on-decrement implies
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* a timer trigger when the count becomes 0, but no-immediate-trigger
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* implies a trigger when the count stops being 0.
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*/
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assert(!((policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT) &&
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(policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)));
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return s;
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}
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void ptimer_free(ptimer_state *s)
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{
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timer_free(s->timer);
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g_free(s);
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}
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