Bin Meng 4791b4c4ab hw/riscv: Drop CONFIG_SIFIVE ... The name SIFIVE is too vague to convey the required component of MSI_NONBROKEN. Let's drop the option, and select MSI_NONBROKEN in each machine instead. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-12-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2020-09-09 15:54:19 -07:00
..
boot.c	RISC-V: Support 64 bit start address	2020-07-13 17:25:37 -07:00
Kconfig	hw/riscv: Drop CONFIG_SIFIVE	2020-09-09 15:54:19 -07:00
meson.build	hw/riscv: Always build riscv_hart.c	2020-09-09 15:54:19 -07:00
microchip_pfsoc.c	hw/riscv: Move sifive_plic model to hw/intc	2020-09-09 15:54:19 -07:00
numa.c	hw/riscv: Add helpers for RISC-V multi-socket NUMA machines	2020-08-25 09:11:35 -07:00
opentitan.c	target/riscv: cpu: Set reset vector based on the configured property value	2020-09-09 15:54:18 -07:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
sifive_e.c	hw/riscv: Move sifive_uart model to hw/char	2020-09-09 15:54:19 -07:00
sifive_u.c	hw/riscv: Move sifive_uart model to hw/char	2020-09-09 15:54:19 -07:00
spike.c	hw/riscv: Move riscv_htif model to hw/char	2020-09-09 15:54:19 -07:00
virt.c	hw/riscv: Move sifive_test model to hw/misc	2020-09-09 15:54:19 -07:00