4921a0ce86
This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move sifive_gpio model to hw/gpio directory. Note this also removes the trace-events in the hw/riscv directory, since gpio is the only supported trace target in that directory. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-5-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
||
---|---|---|
.. | ||
boot.h | ||
boot_opensbi.h | ||
microchip_pfsoc.h | ||
numa.h | ||
opentitan.h | ||
riscv_hart.h | ||
riscv_htif.h | ||
sifive_clint.h | ||
sifive_cpu.h | ||
sifive_e.h | ||
sifive_plic.h | ||
sifive_test.h | ||
sifive_u.h | ||
sifive_uart.h | ||
spike.h | ||
virt.h |