Currently the gpex PCI controller implements no special behaviour for guest accesses to areas of the PIO and MMIO where it has not mapped any PCI devices, which means that for Arm you end up with a CPU exception due to a data abort. Most host OSes expect "like an x86 PC" behaviour, where bad accesses like this return -1 for reads and ignore writes. In the interests of not being surprising, make host CPU accesses to these windows behave as -1/discard where there's no mapped PCI device. The old behaviour generally didn't cause any problems, because almost always the guest OS will map the PCI devices and then only access where it has mapped them. One corner case where you will see this kind of access is if Linux attempts to probe legacy ISA devices via a PIO window access. So far the only case where we've seen this has been via the syzkaller fuzzer. Reported-by: Dmitry Vyukov <dvyukov@google.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20210325163315.27724-1-peter.maydell@linaro.org Fixes: https://bugs.launchpad.net/qemu/+bug/1918917 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
74 lines
1.8 KiB
C
74 lines
1.8 KiB
C
/*
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* QEMU Generic PCI Express Bridge Emulation
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*
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* Copyright (C) 2015 Alexander Graf <agraf@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>
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*/
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#ifndef HW_GPEX_H
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#define HW_GPEX_H
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#include "exec/hwaddr.h"
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#include "hw/sysbus.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pcie_host.h"
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#include "qom/object.h"
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#define TYPE_GPEX_HOST "gpex-pcihost"
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OBJECT_DECLARE_SIMPLE_TYPE(GPEXHost, GPEX_HOST)
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#define TYPE_GPEX_ROOT_DEVICE "gpex-root"
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OBJECT_DECLARE_SIMPLE_TYPE(GPEXRootState, GPEX_ROOT_DEVICE)
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#define GPEX_NUM_IRQS 4
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struct GPEXRootState {
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/*< private >*/
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PCIDevice parent_obj;
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/*< public >*/
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};
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struct GPEXHost {
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/*< private >*/
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PCIExpressHost parent_obj;
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/*< public >*/
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GPEXRootState gpex_root;
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MemoryRegion io_ioport;
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MemoryRegion io_mmio;
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MemoryRegion io_ioport_window;
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MemoryRegion io_mmio_window;
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qemu_irq irq[GPEX_NUM_IRQS];
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int irq_num[GPEX_NUM_IRQS];
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bool allow_unmapped_accesses;
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};
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struct GPEXConfig {
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MemMapEntry ecam;
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MemMapEntry mmio32;
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MemMapEntry mmio64;
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MemMapEntry pio;
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int irq;
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PCIBus *bus;
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};
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int gpex_set_irq_num(GPEXHost *s, int index, int gsi);
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void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg);
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#endif /* HW_GPEX_H */
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