No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]
178 lines
5.3 KiB
C
178 lines
5.3 KiB
C
/*
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* ARM gdb server stub
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/gdbstub.h"
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typedef struct RegisterSysregXmlParam {
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CPUState *cs;
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GString *s;
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} RegisterSysregXmlParam;
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/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
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whatever the target description contains. Due to a historical mishap
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the FPA registers appear in between core integer regs and the CPSR.
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We hack round this by giving the FPA regs zero size when talking to a
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newer gdb. */
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int arm_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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if (n < 16) {
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/* Core integer register. */
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return gdb_get_reg32(mem_buf, env->regs[n]);
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}
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if (n < 24) {
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/* FPA registers. */
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if (gdb_has_xml) {
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return 0;
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}
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memset(mem_buf, 0, 12);
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return 12;
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}
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switch (n) {
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case 24:
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/* FPA status register. */
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if (gdb_has_xml) {
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return 0;
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}
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return gdb_get_reg32(mem_buf, 0);
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case 25:
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/* CPSR */
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return gdb_get_reg32(mem_buf, cpsr_read(env));
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}
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/* Unknown register. */
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return 0;
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}
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int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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CPUARMState *env = &cpu->env;
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uint32_t tmp;
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tmp = ldl_p(mem_buf);
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/* Mask out low bit of PC to workaround gdb bugs. This will probably
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cause problems if we ever implement the Jazelle DBX extensions. */
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if (n == 15) {
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tmp &= ~1;
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}
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if (n < 16) {
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/* Core integer register. */
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env->regs[n] = tmp;
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return 4;
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}
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if (n < 24) { /* 16-23 */
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/* FPA registers (ignored). */
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if (gdb_has_xml) {
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return 0;
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}
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return 12;
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}
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switch (n) {
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case 24:
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/* FPA status register (ignored). */
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if (gdb_has_xml) {
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return 0;
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}
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return 4;
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case 25:
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/* CPSR */
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cpsr_write(env, tmp, 0xffffffff, CPSRWriteByGDBStub);
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return 4;
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}
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/* Unknown register. */
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return 0;
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}
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static void arm_gen_one_xml_reg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml,
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ARMCPRegInfo *ri, uint32_t ri_key,
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int bitsize)
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{
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g_string_append_printf(s, "<reg name=\"%s\"", ri->name);
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g_string_append_printf(s, " bitsize=\"%d\"", bitsize);
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g_string_append_printf(s, " group=\"cp_regs\"/>");
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dyn_xml->num_cpregs++;
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dyn_xml->cpregs_keys[dyn_xml->num_cpregs - 1] = ri_key;
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}
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static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
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gpointer p)
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{
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uint32_t ri_key = *(uint32_t *)key;
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ARMCPRegInfo *ri = value;
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RegisterSysregXmlParam *param = (RegisterSysregXmlParam *)p;
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GString *s = param->s;
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ARMCPU *cpu = ARM_CPU(param->cs);
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CPUARMState *env = &cpu->env;
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DynamicGDBXMLInfo *dyn_xml = &cpu->dyn_xml;
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if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) {
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if (arm_feature(env, ARM_FEATURE_AARCH64)) {
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if (ri->state == ARM_CP_STATE_AA64) {
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arm_gen_one_xml_reg_tag(s , dyn_xml, ri, ri_key, 64);
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}
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} else {
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if (ri->state == ARM_CP_STATE_AA32) {
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if (!arm_feature(env, ARM_FEATURE_EL3) &&
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(ri->secure & ARM_CP_SECSTATE_S)) {
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return;
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}
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if (ri->type & ARM_CP_64BIT) {
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arm_gen_one_xml_reg_tag(s , dyn_xml, ri, ri_key, 64);
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} else {
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arm_gen_one_xml_reg_tag(s , dyn_xml, ri, ri_key, 32);
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}
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}
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}
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}
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}
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int arm_gen_dynamic_xml(CPUState *cs)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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GString *s = g_string_new(NULL);
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RegisterSysregXmlParam param = {cs, s};
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cpu->dyn_xml.num_cpregs = 0;
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cpu->dyn_xml.cpregs_keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs));
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g_string_printf(s, "<?xml version=\"1.0\"?>");
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g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
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g_string_append_printf(s, "<feature name=\"org.qemu.gdb.arm.sys.regs\">");
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g_hash_table_foreach(cpu->cp_regs, arm_register_sysreg_for_xml, ¶m);
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g_string_append_printf(s, "</feature>");
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cpu->dyn_xml.desc = g_string_free(s, false);
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return cpu->dyn_xml.num_cpregs;
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}
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const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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if (strcmp(xmlname, "system-registers.xml") == 0) {
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return cpu->dyn_xml.desc;
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}
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return NULL;
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}
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