bf0f60a61b
[rth: Remove the spreg[EX1] handling, as it's irrelevant to user-mode.] Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443312618-13641-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
#ifndef TILEGX_SYSCALLS_H
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#define TILEGX_SYSCALLS_H
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#define UNAME_MACHINE "tilegx"
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#define UNAME_MINIMUM_RELEASE "3.19"
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#define MMAP_SHIFT TARGET_PAGE_BITS
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#define TILEGX_IS_ERRNO(ret) \
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((ret) > 0xfffffffffffff000ULL) /* errno is 0 -- 4096 */
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typedef uint64_t tilegx_reg_t;
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struct target_pt_regs {
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union {
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/* Saved main processor registers; 56..63 are special. */
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tilegx_reg_t regs[56];
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struct {
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tilegx_reg_t __regs[53];
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tilegx_reg_t tp; /* aliases regs[TREG_TP] */
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tilegx_reg_t sp; /* aliases regs[TREG_SP] */
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tilegx_reg_t lr; /* aliases regs[TREG_LR] */
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};
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};
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/* Saved special registers. */
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tilegx_reg_t pc; /* stored in EX_CONTEXT_K_0 */
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tilegx_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
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tilegx_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
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tilegx_reg_t orig_r0; /* r0 at syscall entry, else zero */
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tilegx_reg_t flags; /* flags (see below) */
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tilegx_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
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tilegx_reg_t pad[2];
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};
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#define TARGET_MLOCKALL_MCL_CURRENT 1
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#define TARGET_MLOCKALL_MCL_FUTURE 2
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/* For faultnum */
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#define TARGET_INT_SWINT_1 14
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#endif
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