000cf4777a
Add registers and function stubs. The functionality is disabled via use_neon_instructions defined to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13 lines
403 B
C
13 lines
403 B
C
/*
|
|
* Copyright (c) 2019 Linaro
|
|
*
|
|
* This work is licensed under the terms of the GNU GPL, version 2 or
|
|
* (at your option) any later version.
|
|
*
|
|
* See the COPYING file in the top-level directory for details.
|
|
*
|
|
* Target-specific opcodes for host vector expansion. These will be
|
|
* emitted by tcg_expand_vec_op. For those familiar with GCC internals,
|
|
* consider these to be UNSPEC with names.
|
|
*/
|