For bare-metal SGX on real hardware, the hardware provides guarantees SGX state at reboot. For instance, all pages start out uninitialized. The vepc driver provides a similar guarantee today for freshly-opened vepc instances, but guests such as Windows expect all pages to be in uninitialized state on startup, including after every guest reboot. Qemu can invoke the ioctl to bring its vEPC pages back to uninitialized state. There is a possibility that some pages fail to be removed if they are SECS pages, and the child and SECS pages could be in separate vEPC regions. Therefore, the ioctl returns the number of EREMOVE failures, telling Qemu to try the ioctl again after it's done with all vEPC regions. The related kernel patches: Link: https://lkml.kernel.org/r/20211021201155.1523989-3-pbonzini@redhat.com Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20211101162009.62161-6-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
244 lines
6.7 KiB
C
244 lines
6.7 KiB
C
/*
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* SGX common code
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*
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* Copyright (C) 2021 Intel Corporation
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*
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* Authors:
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* Yang Zhong<yang.zhong@intel.com>
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* Sean Christopherson <sean.j.christopherson@intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "hw/i386/pc.h"
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#include "hw/i386/sgx-epc.h"
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#include "hw/mem/memory-device.h"
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#include "monitor/qdev.h"
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#include "monitor/monitor.h"
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#include "monitor/hmp-target.h"
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#include "qapi/error.h"
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#include "qapi/qapi-commands-misc-target.h"
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#include "exec/address-spaces.h"
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#include "sysemu/hw_accel.h"
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#include "sysemu/reset.h"
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#include <sys/ioctl.h>
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#define SGX_MAX_EPC_SECTIONS 8
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#define SGX_CPUID_EPC_INVALID 0x0
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/* A valid EPC section. */
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#define SGX_CPUID_EPC_SECTION 0x1
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#define SGX_CPUID_EPC_MASK 0xF
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#define SGX_MAGIC 0xA4
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#define SGX_IOC_VEPC_REMOVE_ALL _IO(SGX_MAGIC, 0x04)
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#define RETRY_NUM 2
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static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high)
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{
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return (low & MAKE_64BIT_MASK(12, 20)) +
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((high & MAKE_64BIT_MASK(0, 20)) << 32);
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}
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static uint64_t sgx_calc_host_epc_section_size(void)
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{
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uint32_t i, type;
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uint32_t eax, ebx, ecx, edx;
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uint64_t size = 0;
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for (i = 0; i < SGX_MAX_EPC_SECTIONS; i++) {
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host_cpuid(0x12, i + 2, &eax, &ebx, &ecx, &edx);
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type = eax & SGX_CPUID_EPC_MASK;
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if (type == SGX_CPUID_EPC_INVALID) {
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break;
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}
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if (type != SGX_CPUID_EPC_SECTION) {
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break;
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}
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size += sgx_calc_section_metric(ecx, edx);
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}
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return size;
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}
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static void sgx_epc_reset(void *opaque)
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{
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PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
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HostMemoryBackend *hostmem;
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SGXEPCDevice *epc;
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int failures;
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int fd, i, j, r;
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static bool warned = false;
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/*
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* The second pass is needed to remove SECS pages that could not
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* be removed during the first.
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*/
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for (i = 0; i < RETRY_NUM; i++) {
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failures = 0;
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for (j = 0; j < pcms->sgx_epc.nr_sections; j++) {
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epc = pcms->sgx_epc.sections[j];
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hostmem = MEMORY_BACKEND(epc->hostmem);
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fd = memory_region_get_fd(host_memory_backend_get_memory(hostmem));
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r = ioctl(fd, SGX_IOC_VEPC_REMOVE_ALL);
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if (r == -ENOTTY && !warned) {
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warned = true;
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warn_report("kernel does not support SGX_IOC_VEPC_REMOVE_ALL");
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warn_report("SGX might operate incorrectly in the guest after reset");
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break;
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} else if (r > 0) {
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/* SECS pages remain */
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failures++;
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if (i == 1) {
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error_report("cannot reset vEPC section %d", j);
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}
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}
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}
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if (!failures) {
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break;
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}
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}
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}
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SGXInfo *qmp_query_sgx_capabilities(Error **errp)
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{
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SGXInfo *info = NULL;
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uint32_t eax, ebx, ecx, edx;
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int fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
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if (fd < 0) {
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error_setg(errp, "SGX is not enabled in KVM");
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return NULL;
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}
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info = g_new0(SGXInfo, 1);
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host_cpuid(0x7, 0, &eax, &ebx, &ecx, &edx);
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info->sgx = ebx & (1U << 2) ? true : false;
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info->flc = ecx & (1U << 30) ? true : false;
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host_cpuid(0x12, 0, &eax, &ebx, &ecx, &edx);
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info->sgx1 = eax & (1U << 0) ? true : false;
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info->sgx2 = eax & (1U << 1) ? true : false;
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info->section_size = sgx_calc_host_epc_section_size();
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close(fd);
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return info;
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}
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SGXInfo *qmp_query_sgx(Error **errp)
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{
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SGXInfo *info = NULL;
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X86MachineState *x86ms;
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PCMachineState *pcms =
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(PCMachineState *)object_dynamic_cast(qdev_get_machine(),
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TYPE_PC_MACHINE);
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if (!pcms) {
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error_setg(errp, "SGX is only supported on PC machines");
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return NULL;
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}
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x86ms = X86_MACHINE(pcms);
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if (!x86ms->sgx_epc_list) {
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error_setg(errp, "No EPC regions defined, SGX not available");
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return NULL;
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}
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SGXEPCState *sgx_epc = &pcms->sgx_epc;
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info = g_new0(SGXInfo, 1);
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info->sgx = true;
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info->sgx1 = true;
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info->sgx2 = true;
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info->flc = true;
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info->section_size = sgx_epc->size;
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return info;
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}
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void hmp_info_sgx(Monitor *mon, const QDict *qdict)
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{
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Error *err = NULL;
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g_autoptr(SGXInfo) info = qmp_query_sgx(&err);
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if (err) {
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error_report_err(err);
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return;
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}
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monitor_printf(mon, "SGX support: %s\n",
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info->sgx ? "enabled" : "disabled");
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monitor_printf(mon, "SGX1 support: %s\n",
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info->sgx1 ? "enabled" : "disabled");
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monitor_printf(mon, "SGX2 support: %s\n",
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info->sgx2 ? "enabled" : "disabled");
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monitor_printf(mon, "FLC support: %s\n",
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info->flc ? "enabled" : "disabled");
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monitor_printf(mon, "size: %" PRIu64 "\n",
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info->section_size);
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}
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bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size)
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{
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PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
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SGXEPCDevice *epc;
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if (pcms->sgx_epc.size == 0 || pcms->sgx_epc.nr_sections <= section_nr) {
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return true;
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}
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epc = pcms->sgx_epc.sections[section_nr];
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*addr = epc->addr;
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*size = memory_device_get_region_size(MEMORY_DEVICE(epc), &error_fatal);
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return false;
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}
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void pc_machine_init_sgx_epc(PCMachineState *pcms)
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{
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SGXEPCState *sgx_epc = &pcms->sgx_epc;
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X86MachineState *x86ms = X86_MACHINE(pcms);
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SgxEPCList *list = NULL;
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Object *obj;
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memset(sgx_epc, 0, sizeof(SGXEPCState));
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if (!x86ms->sgx_epc_list) {
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return;
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}
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sgx_epc->base = 0x100000000ULL + x86ms->above_4g_mem_size;
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memory_region_init(&sgx_epc->mr, OBJECT(pcms), "sgx-epc", UINT64_MAX);
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memory_region_add_subregion(get_system_memory(), sgx_epc->base,
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&sgx_epc->mr);
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for (list = x86ms->sgx_epc_list; list; list = list->next) {
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obj = object_new("sgx-epc");
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/* set the memdev link with memory backend */
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object_property_parse(obj, SGX_EPC_MEMDEV_PROP, list->value->memdev,
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&error_fatal);
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object_property_set_bool(obj, "realized", true, &error_fatal);
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object_unref(obj);
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}
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if ((sgx_epc->base + sgx_epc->size) < sgx_epc->base) {
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error_report("Size of all 'sgx-epc' =0x%"PRIu64" causes EPC to wrap",
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sgx_epc->size);
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exit(EXIT_FAILURE);
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}
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memory_region_set_size(&sgx_epc->mr, sgx_epc->size);
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/* register the reset callback for sgx epc */
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qemu_register_reset(sgx_epc_reset, NULL);
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}
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