The m68k trace mode is controlled by the top 2 bits in the SR register. Implement the m68k "any instruction" trace mode where bit T1=1 and bit T0=0 in which the CPU generates an EXCP_TRACE exception (vector 9 or offset 0x24) after executing each instruction. This functionality is used by the NetBSD kernel debugger to allow single-stepping on m68k architectures. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210519142917.16693-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu> |
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cpu-param.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
fpu_helper.c | ||
gdbstub.c | ||
helper.c | ||
helper.h | ||
m68k-semi.c | ||
meson.build | ||
monitor.c | ||
op_helper.c | ||
qregs.def | ||
softfloat.c | ||
softfloat.h | ||
softfloat_fpsp_tables.h | ||
translate.c |