- Byte swapping for internal GT64XXX registers is controlled by the bit
12 of the Configuration Register and not by the PCI Internal Command
register.
- The bit 0 of the PCI Internal Command register controls byte swapping
for PCI access *except for the internal PCI device*, that is when both
bus and device numbers are 0.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4035 c046a42c-6fe2-441c-8c8c-71466251a162