The RISC-V Physical Memory Protection is restricted to privileged modes. Restrict its compilation to QEMU system builds. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
25 lines
997 B
Makefile
25 lines
997 B
Makefile
obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o gdbstub.o
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obj-$(CONFIG_SOFTMMU) += pmp.o
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DECODETREE = $(SRC_PATH)/scripts/decodetree.py
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decode32-y = $(SRC_PATH)/target/riscv/insn32.decode
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decode32-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn32-64.decode
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decode16-y = $(SRC_PATH)/target/riscv/insn16.decode
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decode16-$(TARGET_RISCV32) += $(SRC_PATH)/target/riscv/insn16-32.decode
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decode16-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn16-64.decode
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target/riscv/decode_insn32.inc.c: $(decode32-y) $(DECODETREE)
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$(call quiet-command, \
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$(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn32 \
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$(decode32-y), "GEN", $(TARGET_DIR)$@)
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target/riscv/decode_insn16.inc.c: $(decode16-y) $(DECODETREE)
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$(call quiet-command, \
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$(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn16 \
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--insnwidth 16 $(decode16-y), "GEN", $(TARGET_DIR)$@)
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target/riscv/translate.o: target/riscv/decode_insn32.inc.c \
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target/riscv/decode_insn16.inc.c
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