Introducing some accessors: ds_get_linesize ds_get_bits_per_pixel ds_get_width ds_get_height ds_get_data Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5789 c046a42c-6fe2-441c-8c8c-71466251a162
392 lines
10 KiB
C
392 lines
10 KiB
C
/*
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* QEMU G364 framebuffer Emulator.
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*
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* Copyright (c) 2007-2008 Hervé Poussineau
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "hw.h"
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#include "console.h"
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#include "pixel_ops.h"
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//#define DEBUG_G364
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typedef struct G364State {
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target_phys_addr_t vram_base;
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unsigned int vram_size;
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uint8_t *vram_buffer;
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uint32_t ctla;
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uint8_t palette[256][3];
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/* display refresh support */
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DisplayState *ds;
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QEMUConsole *console;
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int graphic_mode;
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uint32_t scr_width, scr_height; /* in pixels */
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} G364State;
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/*
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* graphic modes
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*/
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#define BPP 8
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#define PIXEL_WIDTH 8
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#include "g364fb_template.h"
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#undef BPP
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#undef PIXEL_WIDTH
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#define BPP 15
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#define PIXEL_WIDTH 16
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#include "g364fb_template.h"
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#undef BPP
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#undef PIXEL_WIDTH
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#define BPP 16
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#define PIXEL_WIDTH 16
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#include "g364fb_template.h"
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#undef BPP
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#undef PIXEL_WIDTH
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#define BPP 32
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#define PIXEL_WIDTH 32
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#include "g364fb_template.h"
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#undef BPP
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#undef PIXEL_WIDTH
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#define REG_DISPLAYX 0x0918
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#define REG_DISPLAYY 0x0940
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#define CTLA_FORCE_BLANK 0x400
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static void g364fb_draw_graphic(G364State *s, int full_update)
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{
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switch (ds_get_bits_per_pixel(s->ds)) {
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case 8:
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g364fb_draw_graphic8(s, full_update);
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break;
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case 15:
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g364fb_draw_graphic15(s, full_update);
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break;
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case 16:
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g364fb_draw_graphic16(s, full_update);
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break;
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case 32:
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g364fb_draw_graphic32(s, full_update);
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break;
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default:
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printf("g364fb: unknown depth %d\n", ds_get_bits_per_pixel(s->ds));
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return;
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}
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dpy_update(s->ds, 0, 0, s->scr_width, s->scr_height);
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}
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static void g364fb_draw_blank(G364State *s, int full_update)
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{
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int i, w;
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uint8_t *d;
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if (!full_update)
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return;
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w = s->scr_width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
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d = ds_get_data(s->ds);
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for(i = 0; i < s->scr_height; i++) {
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memset(d, 0, w);
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d += ds_get_linesize(s->ds);
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}
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dpy_update(s->ds, 0, 0, s->scr_width, s->scr_height);
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}
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#define GMODE_GRAPH 0
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#define GMODE_BLANK 1
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static void g364fb_update_display(void *opaque)
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{
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G364State *s = opaque;
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int full_update, graphic_mode;
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if (s->scr_width == 0 || s->scr_height == 0)
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return;
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if (s->ctla & CTLA_FORCE_BLANK)
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graphic_mode = GMODE_BLANK;
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else
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graphic_mode = GMODE_GRAPH;
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full_update = 0;
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if (graphic_mode != s->graphic_mode) {
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s->graphic_mode = graphic_mode;
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full_update = 1;
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}
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if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
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qemu_console_resize(s->console, s->scr_width, s->scr_height);
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full_update = 1;
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}
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switch(graphic_mode) {
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case GMODE_GRAPH:
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g364fb_draw_graphic(s, full_update);
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break;
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case GMODE_BLANK:
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default:
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g364fb_draw_blank(s, full_update);
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break;
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}
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}
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/* force a full display refresh */
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static void g364fb_invalidate_display(void *opaque)
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{
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G364State *s = opaque;
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s->graphic_mode = -1; /* force full update */
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}
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static void g364fb_reset(void *opaque)
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{
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G364State *s = opaque;
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memset(s->palette, 0, sizeof(s->palette));
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s->scr_width = s->scr_height = 0;
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memset(s->vram_buffer, 0, s->vram_size);
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s->graphic_mode = -1; /* force full update */
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}
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static void g364fb_screen_dump(void *opaque, const char *filename)
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{
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G364State *s = opaque;
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int y, x;
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uint8_t index;
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uint8_t *data_buffer;
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FILE *f;
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f = fopen(filename, "wb");
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if (!f)
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return;
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data_buffer = s->vram_buffer;
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fprintf(f, "P6\n%d %d\n%d\n",
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s->scr_width, s->scr_height, 255);
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for(y = 0; y < s->scr_height; y++)
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for(x = 0; x < s->scr_width; x++, data_buffer++) {
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index = *data_buffer;
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fputc(s->palette[index][0], f);
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fputc(s->palette[index][1], f);
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fputc(s->palette[index][2], f);
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}
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fclose(f);
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}
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/* called for accesses to io ports */
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static uint32_t g364fb_ctrl_readb(void *opaque, target_phys_addr_t addr)
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{
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//G364State *s = opaque;
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uint32_t val;
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addr &= 0xffff;
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switch (addr) {
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default:
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#ifdef DEBUG_G364
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printf("g364fb/ctrl: invalid read at [" TARGET_FMT_lx "]\n", addr);
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#endif
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val = 0;
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break;
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}
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#ifdef DEBUG_G364
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printf("g364fb/ctrl: read 0x%02x at [" TARGET_FMT_lx "]\n", val, addr);
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#endif
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return val;
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}
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static uint32_t g364fb_ctrl_readw(void *opaque, target_phys_addr_t addr)
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{
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uint32_t v;
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v = g364fb_ctrl_readb(opaque, addr);
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v |= g364fb_ctrl_readb(opaque, addr + 1) << 8;
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return v;
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}
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static uint32_t g364fb_ctrl_readl(void *opaque, target_phys_addr_t addr)
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{
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uint32_t v;
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v = g364fb_ctrl_readb(opaque, addr);
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v |= g364fb_ctrl_readb(opaque, addr + 1) << 8;
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v |= g364fb_ctrl_readb(opaque, addr + 2) << 16;
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v |= g364fb_ctrl_readb(opaque, addr + 3) << 24;
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return v;
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}
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static void g364fb_ctrl_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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G364State *s = opaque;
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addr &= 0xffff;
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#ifdef DEBUG_G364
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printf("g364fb/ctrl: write 0x%02x at [" TARGET_FMT_lx "]\n", val, addr);
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#endif
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if (addr < 0x0800) {
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/* color palette */
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int idx = addr >> 3;
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int c = addr & 7;
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if (c < 3)
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s->palette[idx][c] = (uint8_t)val;
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} else {
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switch (addr) {
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case REG_DISPLAYX:
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s->scr_width = (s->scr_width & 0xfffffc03) | (val << 2);
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break;
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case REG_DISPLAYX + 1:
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s->scr_width = (s->scr_width & 0xfffc03ff) | (val << 10);
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break;
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case REG_DISPLAYY:
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s->scr_height = (s->scr_height & 0xffffff80) | (val >> 1);
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break;
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case REG_DISPLAYY + 1:
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s->scr_height = (s->scr_height & 0xffff801f) | (val << 7);
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break;
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default:
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#ifdef DEBUG_G364
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printf("g364fb/ctrl: invalid write of 0x%02x at [" TARGET_FMT_lx "]\n", val, addr);
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#endif
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break;
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}
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}
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s->graphic_mode = -1; /* force full update */
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}
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static void g364fb_ctrl_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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g364fb_ctrl_writeb(opaque, addr, val & 0xff);
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g364fb_ctrl_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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}
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static void g364fb_ctrl_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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g364fb_ctrl_writeb(opaque, addr, val & 0xff);
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g364fb_ctrl_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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g364fb_ctrl_writeb(opaque, addr + 2, (val >> 16) & 0xff);
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g364fb_ctrl_writeb(opaque, addr + 3, (val >> 24) & 0xff);
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}
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static CPUReadMemoryFunc *g364fb_ctrl_read[3] = {
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g364fb_ctrl_readb,
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g364fb_ctrl_readw,
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g364fb_ctrl_readl,
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};
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static CPUWriteMemoryFunc *g364fb_ctrl_write[3] = {
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g364fb_ctrl_writeb,
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g364fb_ctrl_writew,
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g364fb_ctrl_writel,
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};
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/* called for accesses to video ram */
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static uint32_t g364fb_mem_readb(void *opaque, target_phys_addr_t addr)
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{
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G364State *s = opaque;
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target_phys_addr_t relative_addr = addr - s->vram_base;
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return s->vram_buffer[relative_addr];
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}
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static uint32_t g364fb_mem_readw(void *opaque, target_phys_addr_t addr)
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{
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uint32_t v;
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v = g364fb_mem_readb(opaque, addr);
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v |= g364fb_mem_readb(opaque, addr + 1) << 8;
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return v;
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}
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static uint32_t g364fb_mem_readl(void *opaque, target_phys_addr_t addr)
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{
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uint32_t v;
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v = g364fb_mem_readb(opaque, addr);
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v |= g364fb_mem_readb(opaque, addr + 1) << 8;
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v |= g364fb_mem_readb(opaque, addr + 2) << 16;
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v |= g364fb_mem_readb(opaque, addr + 3) << 24;
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return v;
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}
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static void g364fb_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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G364State *s = opaque;
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target_phys_addr_t relative_addr = addr - s->vram_base;
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s->vram_buffer[relative_addr] = val;
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}
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static void g364fb_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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g364fb_mem_writeb(opaque, addr, val & 0xff);
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g364fb_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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}
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static void g364fb_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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g364fb_mem_writeb(opaque, addr, val & 0xff);
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g364fb_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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g364fb_mem_writeb(opaque, addr + 2, (val >> 16) & 0xff);
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g364fb_mem_writeb(opaque, addr + 3, (val >> 24) & 0xff);
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}
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static CPUReadMemoryFunc *g364fb_mem_read[3] = {
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g364fb_mem_readb,
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g364fb_mem_readw,
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g364fb_mem_readl,
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};
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static CPUWriteMemoryFunc *g364fb_mem_write[3] = {
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g364fb_mem_writeb,
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g364fb_mem_writew,
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g364fb_mem_writel,
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};
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int g364fb_mm_init(DisplayState *ds,
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int vram_size, int it_shift,
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target_phys_addr_t vram_base, target_phys_addr_t ctrl_base)
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{
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G364State *s;
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int io_vram, io_ctrl;
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s = qemu_mallocz(sizeof(G364State));
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if (!s)
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return -1;
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s->vram_size = vram_size;
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s->vram_buffer = qemu_mallocz(s->vram_size);
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qemu_register_reset(g364fb_reset, s);
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g364fb_reset(s);
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s->ds = ds;
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s->vram_base = vram_base;
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s->console = graphic_console_init(ds, g364fb_update_display,
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g364fb_invalidate_display,
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g364fb_screen_dump, NULL, s);
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io_vram = cpu_register_io_memory(0, g364fb_mem_read, g364fb_mem_write, s);
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cpu_register_physical_memory(s->vram_base, vram_size, io_vram);
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io_ctrl = cpu_register_io_memory(0, g364fb_ctrl_read, g364fb_ctrl_write, s);
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cpu_register_physical_memory(ctrl_base, 0x10000, io_ctrl);
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return 0;
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}
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