qemu-patch-raspberry4/target-mips
Leon Alrae 701074a6fc target-mips: fix EntryHi.EHINV being cleared on TLB exception
While implementing TLB invalidation feature we forgot to modify
part of code responsible for updating EntryHi during TLB exception.
Consequently EntryHi.EHINV is unexpectedly cleared on the exception.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-28 11:24:02 +01:00
..
cpu-qom.h
cpu.c
cpu.h
dsp_helper.c
gdbstub.c
helper.c target-mips: fix EntryHi.EHINV being cleared on TLB exception 2016-07-28 11:24:02 +01:00
helper.h
kvm.c kvm-irqchip: i386: add hook for add/remove virq 2016-07-21 20:44:19 +03:00
kvm_mips.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
lmi_helper.c
machine.c
Makefile.objs
mips-defs.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
mips-semi.c
msa_helper.c
op_helper.c
TODO
translate.c
translate_init.c