Header guard symbols should match their file name to make guard collisions less likely. Cleaned up with scripts/clean-header-guards.pl, followed by some renaming of new guard symbols picked by the script to better ones. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190315145123.28030-6-armbru@redhat.com> [Rebase to master: update include/hw/net/ne2000-isa.h]
182 lines
5.5 KiB
C
182 lines
5.5 KiB
C
/*
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* Common IOMMU interface for X86 platform
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*
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* Copyright (C) 2016 Peter Xu, Red Hat <peterx@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_I386_X86_IOMMU_H
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#define HW_I386_X86_IOMMU_H
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#include "hw/sysbus.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/msi.h"
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#define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
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#define X86_IOMMU_DEVICE(obj) \
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OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE)
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#define X86_IOMMU_CLASS(klass) \
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OBJECT_CLASS_CHECK(X86IOMMUClass, (klass), TYPE_X86_IOMMU_DEVICE)
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#define X86_IOMMU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(X86IOMMUClass, obj, TYPE_X86_IOMMU_DEVICE)
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#define X86_IOMMU_SID_INVALID (0xffff)
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typedef struct X86IOMMUState X86IOMMUState;
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typedef struct X86IOMMUClass X86IOMMUClass;
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typedef struct X86IOMMUIrq X86IOMMUIrq;
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typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage;
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typedef enum IommuType {
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TYPE_INTEL,
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TYPE_AMD,
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TYPE_NONE
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} IommuType;
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struct X86IOMMUClass {
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SysBusDeviceClass parent;
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/* Intel/AMD specific realize() hook */
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DeviceRealize realize;
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/* MSI-based interrupt remapping */
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int (*int_remap)(X86IOMMUState *iommu, MSIMessage *src,
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MSIMessage *dst, uint16_t sid);
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};
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/**
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* iec_notify_fn - IEC (Interrupt Entry Cache) notifier hook,
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* triggered when IR invalidation happens.
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* @private: private data
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* @global: whether this is a global IEC invalidation
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* @index: IRTE index to invalidate (start from)
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* @mask: invalidation mask
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*/
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typedef void (*iec_notify_fn)(void *private, bool global,
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uint32_t index, uint32_t mask);
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struct IEC_Notifier {
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iec_notify_fn iec_notify;
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void *private;
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QLIST_ENTRY(IEC_Notifier) list;
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};
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typedef struct IEC_Notifier IEC_Notifier;
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struct X86IOMMUState {
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SysBusDevice busdev;
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OnOffAuto intr_supported; /* Whether vIOMMU supports IR */
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bool dt_supported; /* Whether vIOMMU supports DT */
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bool pt_supported; /* Whether vIOMMU supports pass-through */
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IommuType type; /* IOMMU type - AMD/Intel */
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QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */
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};
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bool x86_iommu_ir_supported(X86IOMMUState *s);
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/* Generic IRQ entry information when interrupt remapping is enabled */
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struct X86IOMMUIrq {
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/* Used by both IOAPIC/MSI interrupt remapping */
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uint8_t trigger_mode;
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uint8_t vector;
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uint8_t delivery_mode;
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uint32_t dest;
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uint8_t dest_mode;
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/* only used by MSI interrupt remapping */
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uint8_t redir_hint;
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uint8_t msi_addr_last_bits;
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};
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struct X86IOMMU_MSIMessage {
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union {
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struct {
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#ifdef HOST_WORDS_BIGENDIAN
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uint32_t __addr_head:12; /* 0xfee */
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uint32_t dest:8;
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uint32_t __reserved:8;
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uint32_t redir_hint:1;
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uint32_t dest_mode:1;
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uint32_t __not_used:2;
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#else
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uint32_t __not_used:2;
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uint32_t dest_mode:1;
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uint32_t redir_hint:1;
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uint32_t __reserved:8;
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uint32_t dest:8;
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uint32_t __addr_head:12; /* 0xfee */
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#endif
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uint32_t __addr_hi;
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} QEMU_PACKED;
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uint64_t msi_addr;
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};
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union {
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struct {
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#ifdef HOST_WORDS_BIGENDIAN
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uint16_t trigger_mode:1;
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uint16_t level:1;
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uint16_t __resved:3;
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uint16_t delivery_mode:3;
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uint16_t vector:8;
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#else
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uint16_t vector:8;
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uint16_t delivery_mode:3;
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uint16_t __resved:3;
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uint16_t level:1;
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uint16_t trigger_mode:1;
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#endif
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uint16_t __resved1;
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} QEMU_PACKED;
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uint32_t msi_data;
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};
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};
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/**
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* x86_iommu_get_default - get default IOMMU device
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* @return: pointer to default IOMMU device
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*/
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X86IOMMUState *x86_iommu_get_default(void);
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/*
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* x86_iommu_get_type - get IOMMU type
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*/
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IommuType x86_iommu_get_type(void);
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/**
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* x86_iommu_iec_register_notifier - register IEC (Interrupt Entry
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* Cache) notifiers
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* @iommu: IOMMU device to register
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* @fn: IEC notifier hook function
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* @data: notifier private data
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*/
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void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
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iec_notify_fn fn, void *data);
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/**
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* x86_iommu_iec_notify_all - Notify IEC invalidations
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* @iommu: IOMMU device that sends the notification
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* @global: whether this is a global invalidation. If true, @index
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* and @mask are undefined.
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* @index: starting index of interrupt entry to invalidate
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* @mask: index mask for the invalidation
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*/
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void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
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uint32_t index, uint32_t mask);
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/**
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* x86_iommu_irq_to_msi_message - Populate one MSIMessage from X86IOMMUIrq
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* @X86IOMMUIrq: The IRQ information
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* @out: Output MSI message
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*/
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void x86_iommu_irq_to_msi_message(X86IOMMUIrq *irq, MSIMessage *out);
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#endif
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