qemu-patch-raspberry4/target
Peter Maydell 7258034ab4 m68k pull request 20210526
implement m68k "any instruction" trace mode
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmCuqAoSHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748pisQALGWkrw9vYqcinTGeR0gRIbqexZCCZ9S
 sTSp+2BJ+uHletEXg0jjl/+3Rh+ILWE9EFT3CcXnWp0vFCHaxWZjW2Ez2tPwMBuF
 A0S2VCUIrvdu7JFb8J8q5NavVlcsd/peP22VM4XuOwHwc4h7nA5ihUexfZMmppVz
 CtiiHXmTa5VBNg4Ae4M3UnTgQlYaftnsVblG0FVZqs8MCb2e4WUd52ILEyu1a7/p
 wHna5qICqEf69HWMGXSab3x2YZV+SKD0A8EdCmJIme//YcJKqFJ4YouwG5WyhKR9
 uYbnTRXbihLXWvC3M7cwPsiIimK/AMlNbufzmhWDOGEB5EwDD0LDfPhx53TM8KMv
 YquHzj+DtPx3alTeEtBaLTt5ImOPj7s7pwCbM3CF+ERZQ9LJ6mEnxkkgpUNTeUIz
 TgT4M3vLl1VglpMCUZojUaQHvA/M1y6pHdNEuXt0RMjXWVhjB7RLn+TcEwVt8YCA
 pf2U9PnbZb450OH8nHNPK/qN1z6G67zaPa99cwem1WXUWCRYVKoRcOPfd1m+gmmT
 ANWSdFDkBlBRfp1dZ4o0qWZ1odf96I8oZFhWKzUNcMFdlxiGiAjceWU0VJNZ+mPJ
 Pt+VYPsg0KUSQEWc0aOLgPaQHrPXjPQI+dAkdShOdbsiKbgbq2NV0ej8YVqiczu6
 +Kc+mGybCPf/
 =WElK
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.1-pull-request' into staging

m68k pull request 20210526

implement m68k "any instruction" trace mode

# gpg: Signature made Wed 26 May 2021 20:56:58 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-6.1-pull-request:
  target/m68k: implement m68k "any instruction" trace mode
  target/m68k: introduce gen_singlestep_exception() function
  target/m68k: call gen_raise_exception() directly if single-stepping in gen_jmp_tb()
  target/m68k: introduce is_singlestepping() function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-27 19:17:42 +01:00
..
alpha target/alpha: fix icount handling for timer instructions 2021-04-05 07:32:56 -07:00
arm target/arm: Enable SVE2 and related extensions 2021-05-25 16:01:44 +01:00
avr target/avr: Ignore unimplemented WDR opcode 2021-05-13 19:18:42 +02:00
cris target/cris: Plug leakage of TCG temporaries 2021-02-22 09:04:58 +01:00
hexagon Trivial patches pull request 20210503 2021-05-05 13:52:00 +01:00
hppa exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
i386 i386/cpu: Expose AVX_VNNI instruction to guest 2021-05-26 14:49:45 +02:00
m68k target/m68k: implement m68k "any instruction" trace mode 2021-05-26 20:45:18 +02:00
microblaze cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
mips target/mips: Set set_default_nan_mode with set_snan_bit_is_one 2021-05-16 07:13:51 -05:00
nios2 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
openrisc Do not include sysemu/sysemu.h if it's not really necessary 2021-05-02 17:24:50 +02:00
ppc target/ppc: Remove type argument for mmubooke206_get_physical_address 2021-05-19 12:52:07 +10:00
riscv target/riscv: Fix the RV64H decode comment 2021-05-11 20:02:07 +10:00
rx Do not include sysemu/sysemu.h if it's not really necessary 2021-05-02 17:24:50 +02:00
s390x target/s390x: Fix translation exception on illegal instruction 2021-05-20 14:19:30 +02:00
sh4 target/sh4: Return error if CPUClass::get_phys_page_debug() fails 2021-05-13 19:00:50 +02:00
sparc hw/sparc*: Move cpu_check_irqs() to target/sparc/ 2021-05-04 22:45:53 +01:00
tricore target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 2021-03-14 14:49:01 +01:00
xtensa target/xtensa: clean up unaligned access 2021-05-20 13:02:58 -07:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00