Stefan Weil 73642f5bdb target-mips: 4Kc, 4KEc cores do not support MIPS16 ... 4Kc, 4KEc cores do not support MIPS16, so not only the CP0_Config1 had to be fixed (see previous patch), but also MIPS16 instructions must not be executed. (Hint from Nathan Froyd, thanks). Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2009-12-16 18:20:19 +01:00
..
cpu.h	target-mips: add new HFLAGs for JALX and 16/32-bit delay slots	2009-12-13 20:20:19 +01:00
exec.h	qemu: per-arch cpu_has_work (Marcelo Tosatti)	2009-04-24 18:03:20 +00:00
helper.c	target-mips: change interrupt bits to be mips16-aware	2009-12-13 20:20:19 +01:00
helper.h	target-mips: use physical address in lladdr	2009-11-30 16:18:28 +01:00
machine.c	target-mips: rename CP0_LLAddr into lladdr	2009-11-22 14:12:13 +01:00
mips-defs.h	Hardware convenience library	2009-05-19 16:17:58 +01:00
op_helper.c	target-mips: change interrupt bits to be mips16-aware	2009-12-13 20:20:19 +01:00
TODO	target-mips: add copyright notice for mips16 work	2009-12-13 20:20:20 +01:00
translate.c	target-mips: fix user-mode emulation startup	2009-12-13 21:01:33 +01:00
translate_init.c	target-mips: 4Kc, 4KEc cores do not support MIPS16	2009-12-16 18:20:19 +01:00