qemu-patch-raspberry4/target
David Hildenbrand 741a4ec186 target/s390x: special handling when starting a CPU with WAIT PSW
When we try to start a CPU with a WAIT PSW, we have to take care that
TCG will actually try to continue executing instructions.

We must therefore really only unhalt the CPU if we don't have a WAIT
PSW. Also document the special order for restart interrupts, which
load a new PSW and change the state to operating.

To keep KVM working, simply don't have a look at the WAIT bit when
loading the PSW. Otherwise the behavior of a restart interrupt when
a CPU stopped would be changed.

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20170928203708.9376-31-david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20 13:32:10 +02:00
..
alpha tcg: remove addr argument from lookup_tb_ptr 2017-10-10 07:37:10 -07:00
arm target/arm: Implement SG instruction corner cases 2017-10-12 13:23:14 +01:00
cris qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
hppa tcg: remove addr argument from lookup_tb_ptr 2017-10-10 07:37:10 -07:00
i386 target/i386: trap on instructions longer than >15 bytes 2017-10-16 18:03:53 +02:00
lm32 qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
m68k qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
microblaze target: [tcg] Use a generic enum for DISAS_ values 2017-09-06 08:06:47 -07:00
mips linux-user: Tidy and enforce reserved_va initialization 2017-10-16 16:00:56 +03:00
moxie qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
nios2 * TCG 8-byte atomic accesses bugfix (Andrew) 2017-10-19 15:38:07 +01:00
openrisc qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
ppc * TCG 8-byte atomic accesses bugfix (Andrew) 2017-10-19 15:38:07 +01:00
s390x target/s390x: special handling when starting a CPU with WAIT PSW 2017-10-20 13:32:10 +02:00
sh4 linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31 2017-10-16 16:00:56 +03:00
sparc qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
tilegx tilegx: replace cpu_tilegx_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
tricore qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
unicore32 qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
xtensa qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00