git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1545 c046a42c-6fe2-441c-8c8c-71466251a162
732 lines
20 KiB
C
732 lines
20 KiB
C
/*
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* KQEMU support
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*
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* Copyright (c) 2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h"
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#ifdef _WIN32
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#include <windows.h>
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#include <winioctl.h>
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#else
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <sys/ioctl.h>
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#endif
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include <inttypes.h>
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#include "cpu.h"
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#include "exec-all.h"
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#ifdef USE_KQEMU
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#define DEBUG
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//#define PROFILE
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#include <unistd.h>
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#include <fcntl.h>
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#include "kqemu/kqemu.h"
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/* compatibility stuff */
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#ifndef KQEMU_RET_SYSCALL
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#define KQEMU_RET_SYSCALL 0x0300 /* syscall insn */
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#endif
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#ifndef KQEMU_MAX_RAM_PAGES_TO_UPDATE
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#define KQEMU_MAX_RAM_PAGES_TO_UPDATE 512
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#define KQEMU_RAM_PAGES_UPDATE_ALL (KQEMU_MAX_RAM_PAGES_TO_UPDATE + 1)
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#endif
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#ifdef _WIN32
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#define KQEMU_DEVICE "\\\\.\\kqemu"
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#else
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#define KQEMU_DEVICE "/dev/kqemu"
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#endif
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#ifdef _WIN32
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#define KQEMU_INVALID_FD INVALID_HANDLE_VALUE
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HANDLE kqemu_fd = KQEMU_INVALID_FD;
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#define kqemu_closefd(x) CloseHandle(x)
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#else
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#define KQEMU_INVALID_FD -1
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int kqemu_fd = KQEMU_INVALID_FD;
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#define kqemu_closefd(x) close(x)
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#endif
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int kqemu_allowed = 1;
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unsigned long *pages_to_flush;
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unsigned int nb_pages_to_flush;
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unsigned long *ram_pages_to_update;
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unsigned int nb_ram_pages_to_update;
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extern uint32_t **l1_phys_map;
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#define cpuid(index, eax, ebx, ecx, edx) \
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asm volatile ("cpuid" \
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: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) \
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: "0" (index))
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#ifdef __x86_64__
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static int is_cpuid_supported(void)
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{
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return 1;
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}
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#else
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static int is_cpuid_supported(void)
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{
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int v0, v1;
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asm volatile ("pushf\n"
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"popl %0\n"
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"movl %0, %1\n"
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"xorl $0x00200000, %0\n"
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"pushl %0\n"
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"popf\n"
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"pushf\n"
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"popl %0\n"
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: "=a" (v0), "=d" (v1)
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:
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: "cc");
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return (v0 != v1);
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}
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#endif
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static void kqemu_update_cpuid(CPUState *env)
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{
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int critical_features_mask, features;
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uint32_t eax, ebx, ecx, edx;
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/* the following features are kept identical on the host and
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target cpus because they are important for user code. Strictly
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speaking, only SSE really matters because the OS must support
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it if the user code uses it. */
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critical_features_mask =
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CPUID_CMOV | CPUID_CX8 |
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CPUID_FXSR | CPUID_MMX | CPUID_SSE |
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CPUID_SSE2;
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if (!is_cpuid_supported()) {
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features = 0;
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} else {
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cpuid(1, eax, ebx, ecx, edx);
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features = edx;
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}
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env->cpuid_features = (env->cpuid_features & ~critical_features_mask) |
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(features & critical_features_mask);
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/* XXX: we could update more of the target CPUID state so that the
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non accelerated code sees exactly the same CPU features as the
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accelerated code */
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}
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int kqemu_init(CPUState *env)
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{
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struct kqemu_init init;
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int ret, version;
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#ifdef _WIN32
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DWORD temp;
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#endif
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if (!kqemu_allowed)
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return -1;
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#ifdef _WIN32
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kqemu_fd = CreateFile(KQEMU_DEVICE, GENERIC_WRITE | GENERIC_READ,
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FILE_SHARE_READ | FILE_SHARE_WRITE,
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NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL,
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NULL);
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#else
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kqemu_fd = open(KQEMU_DEVICE, O_RDWR);
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#endif
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if (kqemu_fd == KQEMU_INVALID_FD) {
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fprintf(stderr, "Could not open '%s' - QEMU acceleration layer not activated\n", KQEMU_DEVICE);
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return -1;
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}
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version = 0;
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#ifdef _WIN32
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DeviceIoControl(kqemu_fd, KQEMU_GET_VERSION, NULL, 0,
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&version, sizeof(version), &temp, NULL);
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#else
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ioctl(kqemu_fd, KQEMU_GET_VERSION, &version);
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#endif
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if (version != KQEMU_VERSION) {
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fprintf(stderr, "Version mismatch between kqemu module and qemu (%08x %08x) - disabling kqemu use\n",
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version, KQEMU_VERSION);
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goto fail;
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}
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pages_to_flush = qemu_vmalloc(KQEMU_MAX_PAGES_TO_FLUSH *
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sizeof(unsigned long));
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if (!pages_to_flush)
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goto fail;
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ram_pages_to_update = qemu_vmalloc(KQEMU_MAX_RAM_PAGES_TO_UPDATE *
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sizeof(unsigned long));
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if (!ram_pages_to_update)
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goto fail;
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init.ram_base = phys_ram_base;
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init.ram_size = phys_ram_size;
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init.ram_dirty = phys_ram_dirty;
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init.phys_to_ram_map = l1_phys_map;
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init.pages_to_flush = pages_to_flush;
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#if KQEMU_VERSION >= 0x010200
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init.ram_pages_to_update = ram_pages_to_update;
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#endif
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#ifdef _WIN32
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ret = DeviceIoControl(kqemu_fd, KQEMU_INIT, &init, sizeof(init),
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NULL, 0, &temp, NULL) == TRUE ? 0 : -1;
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#else
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ret = ioctl(kqemu_fd, KQEMU_INIT, &init);
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#endif
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if (ret < 0) {
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fprintf(stderr, "Error %d while initializing QEMU acceleration layer - disabling it for now\n", ret);
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fail:
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kqemu_closefd(kqemu_fd);
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kqemu_fd = KQEMU_INVALID_FD;
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return -1;
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}
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kqemu_update_cpuid(env);
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env->kqemu_enabled = 1;
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nb_pages_to_flush = 0;
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nb_ram_pages_to_update = 0;
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return 0;
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}
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void kqemu_flush_page(CPUState *env, target_ulong addr)
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{
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#ifdef DEBUG
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if (loglevel & CPU_LOG_INT) {
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fprintf(logfile, "kqemu_flush_page: addr=" TARGET_FMT_lx "\n", addr);
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}
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#endif
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if (nb_pages_to_flush >= KQEMU_MAX_PAGES_TO_FLUSH)
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nb_pages_to_flush = KQEMU_FLUSH_ALL;
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else
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pages_to_flush[nb_pages_to_flush++] = addr;
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}
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void kqemu_flush(CPUState *env, int global)
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{
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#ifdef DEBUG
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if (loglevel & CPU_LOG_INT) {
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fprintf(logfile, "kqemu_flush:\n");
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}
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#endif
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nb_pages_to_flush = KQEMU_FLUSH_ALL;
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}
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void kqemu_set_notdirty(CPUState *env, ram_addr_t ram_addr)
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{
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#ifdef DEBUG
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if (loglevel & CPU_LOG_INT) {
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fprintf(logfile, "kqemu_set_notdirty: addr=%08lx\n", ram_addr);
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}
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#endif
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if (nb_ram_pages_to_update >= KQEMU_MAX_RAM_PAGES_TO_UPDATE)
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nb_ram_pages_to_update = KQEMU_RAM_PAGES_UPDATE_ALL;
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else
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ram_pages_to_update[nb_ram_pages_to_update++] = ram_addr;
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}
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struct fpstate {
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uint16_t fpuc;
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uint16_t dummy1;
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uint16_t fpus;
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uint16_t dummy2;
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uint16_t fptag;
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uint16_t dummy3;
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uint32_t fpip;
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uint32_t fpcs;
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uint32_t fpoo;
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uint32_t fpos;
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uint8_t fpregs1[8 * 10];
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};
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struct fpxstate {
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uint16_t fpuc;
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uint16_t fpus;
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uint16_t fptag;
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uint16_t fop;
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uint32_t fpuip;
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uint16_t cs_sel;
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uint16_t dummy0;
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uint32_t fpudp;
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uint16_t ds_sel;
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uint16_t dummy1;
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uint32_t mxcsr;
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uint32_t mxcsr_mask;
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uint8_t fpregs1[8 * 16];
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uint8_t xmm_regs[16 * 16];
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uint8_t dummy2[96];
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};
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static struct fpxstate fpx1 __attribute__((aligned(16)));
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static void restore_native_fp_frstor(CPUState *env)
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{
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int fptag, i, j;
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struct fpstate fp1, *fp = &fp1;
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fp->fpuc = env->fpuc;
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fp->fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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fptag = 0;
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for (i=7; i>=0; i--) {
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fptag <<= 2;
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if (env->fptags[i]) {
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fptag |= 3;
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} else {
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/* the FPU automatically computes it */
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}
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}
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fp->fptag = fptag;
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j = env->fpstt;
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for(i = 0;i < 8; i++) {
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memcpy(&fp->fpregs1[i * 10], &env->fpregs[j].d, 10);
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j = (j + 1) & 7;
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}
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asm volatile ("frstor %0" : "=m" (*fp));
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}
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static void save_native_fp_fsave(CPUState *env)
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{
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int fptag, i, j;
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uint16_t fpuc;
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struct fpstate fp1, *fp = &fp1;
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asm volatile ("fsave %0" : : "m" (*fp));
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env->fpuc = fp->fpuc;
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env->fpstt = (fp->fpus >> 11) & 7;
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env->fpus = fp->fpus & ~0x3800;
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fptag = fp->fptag;
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for(i = 0;i < 8; i++) {
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env->fptags[i] = ((fptag & 3) == 3);
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fptag >>= 2;
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}
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j = env->fpstt;
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for(i = 0;i < 8; i++) {
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memcpy(&env->fpregs[j].d, &fp->fpregs1[i * 10], 10);
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j = (j + 1) & 7;
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}
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/* we must restore the default rounding state */
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fpuc = 0x037f | (env->fpuc & (3 << 10));
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asm volatile("fldcw %0" : : "m" (fpuc));
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}
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static void restore_native_fp_fxrstor(CPUState *env)
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{
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struct fpxstate *fp = &fpx1;
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int i, j, fptag;
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fp->fpuc = env->fpuc;
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fp->fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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fptag = 0;
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for(i = 0; i < 8; i++)
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fptag |= (env->fptags[i] << i);
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fp->fptag = fptag ^ 0xff;
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j = env->fpstt;
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for(i = 0;i < 8; i++) {
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memcpy(&fp->fpregs1[i * 16], &env->fpregs[j].d, 10);
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j = (j + 1) & 7;
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}
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if (env->cpuid_features & CPUID_SSE) {
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fp->mxcsr = env->mxcsr;
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/* XXX: check if DAZ is not available */
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fp->mxcsr_mask = 0xffff;
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memcpy(fp->xmm_regs, env->xmm_regs, CPU_NB_REGS * 16);
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}
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asm volatile ("fxrstor %0" : "=m" (*fp));
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}
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static void save_native_fp_fxsave(CPUState *env)
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{
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struct fpxstate *fp = &fpx1;
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int fptag, i, j;
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uint16_t fpuc;
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asm volatile ("fxsave %0" : : "m" (*fp));
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env->fpuc = fp->fpuc;
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env->fpstt = (fp->fpus >> 11) & 7;
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env->fpus = fp->fpus & ~0x3800;
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fptag = fp->fptag ^ 0xff;
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for(i = 0;i < 8; i++) {
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env->fptags[i] = (fptag >> i) & 1;
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}
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j = env->fpstt;
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for(i = 0;i < 8; i++) {
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memcpy(&env->fpregs[j].d, &fp->fpregs1[i * 16], 10);
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j = (j + 1) & 7;
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}
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if (env->cpuid_features & CPUID_SSE) {
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env->mxcsr = fp->mxcsr;
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memcpy(env->xmm_regs, fp->xmm_regs, CPU_NB_REGS * 16);
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}
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/* we must restore the default rounding state */
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asm volatile ("fninit");
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fpuc = 0x037f | (env->fpuc & (3 << 10));
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asm volatile("fldcw %0" : : "m" (fpuc));
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}
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static int do_syscall(CPUState *env,
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struct kqemu_cpu_state *kenv)
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{
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int selector;
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selector = (env->star >> 32) & 0xffff;
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#ifdef __x86_64__
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if (env->hflags & HF_LMA_MASK) {
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env->regs[R_ECX] = kenv->next_eip;
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env->regs[11] = env->eflags;
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cpu_x86_set_cpl(env, 0);
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cpu_x86_load_seg_cache(env, R_CS, selector & 0xfffc,
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0, 0xffffffff,
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DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
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DESC_S_MASK |
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DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK | DESC_L_MASK);
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cpu_x86_load_seg_cache(env, R_SS, (selector + 8) & 0xfffc,
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0, 0xffffffff,
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DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
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DESC_S_MASK |
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DESC_W_MASK | DESC_A_MASK);
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env->eflags &= ~env->fmask;
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if (env->hflags & HF_CS64_MASK)
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env->eip = env->lstar;
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else
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env->eip = env->cstar;
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} else
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#endif
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{
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env->regs[R_ECX] = (uint32_t)kenv->next_eip;
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cpu_x86_set_cpl(env, 0);
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cpu_x86_load_seg_cache(env, R_CS, selector & 0xfffc,
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0, 0xffffffff,
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DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
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DESC_S_MASK |
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DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK);
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cpu_x86_load_seg_cache(env, R_SS, (selector + 8) & 0xfffc,
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0, 0xffffffff,
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DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
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DESC_S_MASK |
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DESC_W_MASK | DESC_A_MASK);
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env->eflags &= ~(IF_MASK | RF_MASK | VM_MASK);
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env->eip = (uint32_t)env->star;
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}
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return 2;
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}
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#ifdef PROFILE
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#define PC_REC_SIZE 1
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#define PC_REC_HASH_BITS 16
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#define PC_REC_HASH_SIZE (1 << PC_REC_HASH_BITS)
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typedef struct PCRecord {
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unsigned long pc;
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int64_t count;
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struct PCRecord *next;
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} PCRecord;
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PCRecord *pc_rec_hash[PC_REC_HASH_SIZE];
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int nb_pc_records;
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void kqemu_record_pc(unsigned long pc)
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{
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unsigned long h;
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PCRecord **pr, *r;
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h = pc / PC_REC_SIZE;
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h = h ^ (h >> PC_REC_HASH_BITS);
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h &= (PC_REC_HASH_SIZE - 1);
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pr = &pc_rec_hash[h];
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for(;;) {
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r = *pr;
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if (r == NULL)
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break;
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if (r->pc == pc) {
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r->count++;
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return;
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}
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pr = &r->next;
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}
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r = malloc(sizeof(PCRecord));
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r->count = 1;
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r->pc = pc;
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r->next = NULL;
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*pr = r;
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nb_pc_records++;
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}
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int pc_rec_cmp(const void *p1, const void *p2)
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{
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PCRecord *r1 = *(PCRecord **)p1;
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PCRecord *r2 = *(PCRecord **)p2;
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if (r1->count < r2->count)
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return 1;
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else if (r1->count == r2->count)
|
|
return 0;
|
|
else
|
|
return -1;
|
|
}
|
|
|
|
void kqemu_record_dump(void)
|
|
{
|
|
PCRecord **pr, *r;
|
|
int i, h;
|
|
FILE *f;
|
|
int64_t total, sum;
|
|
|
|
pr = malloc(sizeof(PCRecord *) * nb_pc_records);
|
|
i = 0;
|
|
total = 0;
|
|
for(h = 0; h < PC_REC_HASH_SIZE; h++) {
|
|
for(r = pc_rec_hash[h]; r != NULL; r = r->next) {
|
|
pr[i++] = r;
|
|
total += r->count;
|
|
}
|
|
}
|
|
qsort(pr, nb_pc_records, sizeof(PCRecord *), pc_rec_cmp);
|
|
|
|
f = fopen("/tmp/kqemu.stats", "w");
|
|
if (!f) {
|
|
perror("/tmp/kqemu.stats");
|
|
exit(1);
|
|
}
|
|
fprintf(f, "total: %lld\n", total);
|
|
sum = 0;
|
|
for(i = 0; i < nb_pc_records; i++) {
|
|
r = pr[i];
|
|
sum += r->count;
|
|
fprintf(f, "%08lx: %lld %0.2f%% %0.2f%%\n",
|
|
r->pc,
|
|
r->count,
|
|
(double)r->count / (double)total * 100.0,
|
|
(double)sum / (double)total * 100.0);
|
|
}
|
|
fclose(f);
|
|
free(pr);
|
|
}
|
|
#else
|
|
void kqemu_record_dump(void)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
int kqemu_cpu_exec(CPUState *env)
|
|
{
|
|
struct kqemu_cpu_state kcpu_state, *kenv = &kcpu_state;
|
|
int ret;
|
|
#ifdef _WIN32
|
|
DWORD temp;
|
|
#endif
|
|
|
|
#ifdef DEBUG
|
|
if (loglevel & CPU_LOG_INT) {
|
|
fprintf(logfile, "kqemu: cpu_exec: enter\n");
|
|
cpu_dump_state(env, logfile, fprintf, 0);
|
|
}
|
|
#endif
|
|
memcpy(kenv->regs, env->regs, sizeof(kenv->regs));
|
|
kenv->eip = env->eip;
|
|
kenv->eflags = env->eflags;
|
|
memcpy(&kenv->segs, &env->segs, sizeof(env->segs));
|
|
memcpy(&kenv->ldt, &env->ldt, sizeof(env->ldt));
|
|
memcpy(&kenv->tr, &env->tr, sizeof(env->tr));
|
|
memcpy(&kenv->gdt, &env->gdt, sizeof(env->gdt));
|
|
memcpy(&kenv->idt, &env->idt, sizeof(env->idt));
|
|
kenv->cr0 = env->cr[0];
|
|
kenv->cr2 = env->cr[2];
|
|
kenv->cr3 = env->cr[3];
|
|
kenv->cr4 = env->cr[4];
|
|
kenv->a20_mask = env->a20_mask;
|
|
#if KQEMU_VERSION >= 0x010100
|
|
kenv->efer = env->efer;
|
|
#endif
|
|
if (env->dr[7] & 0xff) {
|
|
kenv->dr7 = env->dr[7];
|
|
kenv->dr0 = env->dr[0];
|
|
kenv->dr1 = env->dr[1];
|
|
kenv->dr2 = env->dr[2];
|
|
kenv->dr3 = env->dr[3];
|
|
} else {
|
|
kenv->dr7 = 0;
|
|
}
|
|
kenv->dr6 = env->dr[6];
|
|
kenv->cpl = 3;
|
|
kenv->nb_pages_to_flush = nb_pages_to_flush;
|
|
nb_pages_to_flush = 0;
|
|
#if KQEMU_VERSION >= 0x010200
|
|
kenv->user_only = 1;
|
|
kenv->nb_ram_pages_to_update = nb_ram_pages_to_update;
|
|
#endif
|
|
nb_ram_pages_to_update = 0;
|
|
|
|
if (!(kenv->cr0 & CR0_TS_MASK)) {
|
|
if (env->cpuid_features & CPUID_FXSR)
|
|
restore_native_fp_fxrstor(env);
|
|
else
|
|
restore_native_fp_frstor(env);
|
|
}
|
|
|
|
#ifdef _WIN32
|
|
DeviceIoControl(kqemu_fd, KQEMU_EXEC,
|
|
kenv, sizeof(struct kqemu_cpu_state),
|
|
kenv, sizeof(struct kqemu_cpu_state),
|
|
&temp, NULL);
|
|
ret = kenv->retval;
|
|
#else
|
|
#if KQEMU_VERSION >= 0x010100
|
|
ioctl(kqemu_fd, KQEMU_EXEC, kenv);
|
|
ret = kenv->retval;
|
|
#else
|
|
ret = ioctl(kqemu_fd, KQEMU_EXEC, kenv);
|
|
#endif
|
|
#endif
|
|
if (!(kenv->cr0 & CR0_TS_MASK)) {
|
|
if (env->cpuid_features & CPUID_FXSR)
|
|
save_native_fp_fxsave(env);
|
|
else
|
|
save_native_fp_fsave(env);
|
|
}
|
|
|
|
memcpy(env->regs, kenv->regs, sizeof(env->regs));
|
|
env->eip = kenv->eip;
|
|
env->eflags = kenv->eflags;
|
|
memcpy(env->segs, kenv->segs, sizeof(env->segs));
|
|
#if 0
|
|
/* no need to restore that */
|
|
memcpy(env->ldt, kenv->ldt, sizeof(env->ldt));
|
|
memcpy(env->tr, kenv->tr, sizeof(env->tr));
|
|
memcpy(env->gdt, kenv->gdt, sizeof(env->gdt));
|
|
memcpy(env->idt, kenv->idt, sizeof(env->idt));
|
|
env->cr[0] = kenv->cr0;
|
|
env->cr[3] = kenv->cr3;
|
|
env->cr[4] = kenv->cr4;
|
|
env->a20_mask = kenv->a20_mask;
|
|
#endif
|
|
env->cr[2] = kenv->cr2;
|
|
env->dr[6] = kenv->dr6;
|
|
|
|
#if KQEMU_VERSION >= 0x010200
|
|
if (kenv->nb_ram_pages_to_update > 0) {
|
|
cpu_tlb_update_dirty(env);
|
|
}
|
|
#endif
|
|
|
|
/* restore the hidden flags */
|
|
{
|
|
unsigned int new_hflags;
|
|
#ifdef TARGET_X86_64
|
|
if ((env->hflags & HF_LMA_MASK) &&
|
|
(env->segs[R_CS].flags & DESC_L_MASK)) {
|
|
/* long mode */
|
|
new_hflags = HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;
|
|
} else
|
|
#endif
|
|
{
|
|
/* legacy / compatibility case */
|
|
new_hflags = (env->segs[R_CS].flags & DESC_B_MASK)
|
|
>> (DESC_B_SHIFT - HF_CS32_SHIFT);
|
|
new_hflags |= (env->segs[R_SS].flags & DESC_B_MASK)
|
|
>> (DESC_B_SHIFT - HF_SS32_SHIFT);
|
|
if (!(env->cr[0] & CR0_PE_MASK) ||
|
|
(env->eflags & VM_MASK) ||
|
|
!(env->hflags & HF_CS32_MASK)) {
|
|
/* XXX: try to avoid this test. The problem comes from the
|
|
fact that is real mode or vm86 mode we only modify the
|
|
'base' and 'selector' fields of the segment cache to go
|
|
faster. A solution may be to force addseg to one in
|
|
translate-i386.c. */
|
|
new_hflags |= HF_ADDSEG_MASK;
|
|
} else {
|
|
new_hflags |= ((env->segs[R_DS].base |
|
|
env->segs[R_ES].base |
|
|
env->segs[R_SS].base) != 0) <<
|
|
HF_ADDSEG_SHIFT;
|
|
}
|
|
}
|
|
env->hflags = (env->hflags &
|
|
~(HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)) |
|
|
new_hflags;
|
|
}
|
|
|
|
#ifdef DEBUG
|
|
if (loglevel & CPU_LOG_INT) {
|
|
fprintf(logfile, "kqemu: kqemu_cpu_exec: ret=0x%x\n", ret);
|
|
}
|
|
#endif
|
|
if (ret == KQEMU_RET_SYSCALL) {
|
|
/* syscall instruction */
|
|
return do_syscall(env, kenv);
|
|
} else
|
|
if ((ret & 0xff00) == KQEMU_RET_INT) {
|
|
env->exception_index = ret & 0xff;
|
|
env->error_code = 0;
|
|
env->exception_is_int = 1;
|
|
env->exception_next_eip = kenv->next_eip;
|
|
#ifdef DEBUG
|
|
if (loglevel & CPU_LOG_INT) {
|
|
fprintf(logfile, "kqemu: interrupt v=%02x:\n",
|
|
env->exception_index);
|
|
cpu_dump_state(env, logfile, fprintf, 0);
|
|
}
|
|
#endif
|
|
return 1;
|
|
} else if ((ret & 0xff00) == KQEMU_RET_EXCEPTION) {
|
|
env->exception_index = ret & 0xff;
|
|
env->error_code = kenv->error_code;
|
|
env->exception_is_int = 0;
|
|
env->exception_next_eip = 0;
|
|
#ifdef DEBUG
|
|
if (loglevel & CPU_LOG_INT) {
|
|
fprintf(logfile, "kqemu: exception v=%02x e=%04x:\n",
|
|
env->exception_index, env->error_code);
|
|
cpu_dump_state(env, logfile, fprintf, 0);
|
|
}
|
|
#endif
|
|
return 1;
|
|
} else if (ret == KQEMU_RET_INTR) {
|
|
#ifdef DEBUG
|
|
if (loglevel & CPU_LOG_INT) {
|
|
cpu_dump_state(env, logfile, fprintf, 0);
|
|
}
|
|
#endif
|
|
return 0;
|
|
} else if (ret == KQEMU_RET_SOFTMMU) {
|
|
#ifdef PROFILE
|
|
kqemu_record_pc(env->eip + env->segs[R_CS].base);
|
|
#endif
|
|
#ifdef DEBUG
|
|
if (loglevel & CPU_LOG_INT) {
|
|
cpu_dump_state(env, logfile, fprintf, 0);
|
|
}
|
|
#endif
|
|
return 2;
|
|
} else {
|
|
cpu_dump_state(env, stderr, fprintf, 0);
|
|
fprintf(stderr, "Unsupported return value: 0x%x\n", ret);
|
|
exit(1);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#endif
|