1c8a2388aa
The SCU is a collection of chip-level control registers that manage the various functions supported by ASPEED SoCs. Typically the bits control interactions with clocks, external hardware or reset behaviour, and we can largly take a hands-off approach to reads and writes. Firmware makes heavy use of the state to determine how to boot, but the reset values vary from SoC to SoC (eg AST2400 vs AST2500). A qdev property is exposed so that the integrating SoC model can configure the silicon revision, which in-turn selects the appropriate reset values. Further qdev properties are exposed so the board model can configure the board-dependent hardware strapping. Almost all provided AST2400 reset values are specified by the datasheet. The notable exception is SOC_SCRATCH1, where we mark the DRAM as successfully initialised to avoid unnecessary dark corners in the SoC's u-boot support. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1466744305-23163-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: drop unnecessary inttypes.h include] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
56 lines
2.9 KiB
Plaintext
56 lines
2.9 KiB
Plaintext
# See docs/trace-events.txt for syntax documentation.
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# hw/misc/eccmemctl.c
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ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
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ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
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ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
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ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
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ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
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ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
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ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
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ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
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ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
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ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
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ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
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ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
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ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
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ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
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ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
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ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
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ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
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ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
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# hw/misc/slavio_misc.c
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slavio_misc_update_irq_raise(void) "Raise IRQ"
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slavio_misc_update_irq_lower(void) "Lower IRQ"
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slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
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slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
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slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
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slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
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slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
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slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
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slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
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slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
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slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
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slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
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slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
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apc_mem_writeb(uint32_t val) "Write power management %02x"
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apc_mem_readb(uint32_t ret) "Read power management %02x"
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slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
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slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
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slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
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slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
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# hw/misc/milkymist-hpdmc.c
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milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
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milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
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# hw/misc/milkymist-pfpu.c
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milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
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milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
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milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
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milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
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# hw/misc/aspeed_scu.c
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aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
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