See ISA, 4.3.2 for details. Operations that change LEND SR value invalidate TBs at the old and at the new LEND. LEND value at TB compilation time is considered constant and loop instruction is generated based on this value. Invalidation may be avoided for the TB at the old LEND address, since looping code verifies actual LEND value. Invalidation may be avoided for the TB at the new LEND address if there's a way to associate LEND address with TB at compilation time and later verify that it doesn't change. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
315 lines
9.2 KiB
C
315 lines
9.2 KiB
C
/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu.h"
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#include "dyngen-exec.h"
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#include "helpers.h"
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#include "host-utils.h"
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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{
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tlb_set_page(cpu_single_env,
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addr & ~(TARGET_PAGE_SIZE - 1),
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addr & ~(TARGET_PAGE_SIZE - 1),
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PAGE_READ | PAGE_WRITE | PAGE_EXEC,
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mmu_idx, TARGET_PAGE_SIZE);
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}
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void HELPER(exception)(uint32_t excp)
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{
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env->exception_index = excp;
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cpu_loop_exit(env);
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}
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void HELPER(exception_cause)(uint32_t pc, uint32_t cause)
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{
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uint32_t vector;
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env->pc = pc;
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if (env->sregs[PS] & PS_EXCM) {
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if (env->config->ndepc) {
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env->sregs[DEPC] = pc;
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} else {
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env->sregs[EPC1] = pc;
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}
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vector = EXC_DOUBLE;
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} else {
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env->sregs[EPC1] = pc;
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vector = (env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
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}
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env->sregs[EXCCAUSE] = cause;
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env->sregs[PS] |= PS_EXCM;
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HELPER(exception)(vector);
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}
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void HELPER(exception_cause_vaddr)(uint32_t pc, uint32_t cause, uint32_t vaddr)
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{
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env->sregs[EXCVADDR] = vaddr;
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HELPER(exception_cause)(pc, cause);
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}
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uint32_t HELPER(nsa)(uint32_t v)
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{
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if (v & 0x80000000) {
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v = ~v;
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}
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return v ? clz32(v) - 1 : 31;
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}
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uint32_t HELPER(nsau)(uint32_t v)
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{
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return v ? clz32(v) : 32;
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}
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static void copy_window_from_phys(CPUState *env,
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uint32_t window, uint32_t phys, uint32_t n)
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{
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assert(phys < env->config->nareg);
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if (phys + n <= env->config->nareg) {
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memcpy(env->regs + window, env->phys_regs + phys,
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n * sizeof(uint32_t));
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} else {
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uint32_t n1 = env->config->nareg - phys;
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memcpy(env->regs + window, env->phys_regs + phys,
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n1 * sizeof(uint32_t));
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memcpy(env->regs + window + n1, env->phys_regs,
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(n - n1) * sizeof(uint32_t));
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}
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}
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static void copy_phys_from_window(CPUState *env,
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uint32_t phys, uint32_t window, uint32_t n)
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{
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assert(phys < env->config->nareg);
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if (phys + n <= env->config->nareg) {
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memcpy(env->phys_regs + phys, env->regs + window,
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n * sizeof(uint32_t));
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} else {
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uint32_t n1 = env->config->nareg - phys;
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memcpy(env->phys_regs + phys, env->regs + window,
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n1 * sizeof(uint32_t));
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memcpy(env->phys_regs, env->regs + window + n1,
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(n - n1) * sizeof(uint32_t));
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}
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}
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static inline unsigned windowbase_bound(unsigned a, const CPUState *env)
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{
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return a & (env->config->nareg / 4 - 1);
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}
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static inline unsigned windowstart_bit(unsigned a, const CPUState *env)
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{
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return 1 << windowbase_bound(a, env);
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}
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void xtensa_sync_window_from_phys(CPUState *env)
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{
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copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16);
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}
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void xtensa_sync_phys_from_window(CPUState *env)
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{
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copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16);
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}
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static void rotate_window_abs(uint32_t position)
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{
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xtensa_sync_phys_from_window(env);
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env->sregs[WINDOW_BASE] = windowbase_bound(position, env);
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xtensa_sync_window_from_phys(env);
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}
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static void rotate_window(uint32_t delta)
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{
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rotate_window_abs(env->sregs[WINDOW_BASE] + delta);
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}
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void HELPER(wsr_windowbase)(uint32_t v)
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{
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rotate_window_abs(v);
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}
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void HELPER(entry)(uint32_t pc, uint32_t s, uint32_t imm)
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{
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int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT;
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if (s > 3 || ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) != 0) {
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qemu_log("Illegal entry instruction(pc = %08x), PS = %08x\n",
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pc, env->sregs[PS]);
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HELPER(exception_cause)(pc, ILLEGAL_INSTRUCTION_CAUSE);
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} else {
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env->regs[(callinc << 2) | (s & 3)] = env->regs[s] - (imm << 3);
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rotate_window(callinc);
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env->sregs[WINDOW_START] |=
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windowstart_bit(env->sregs[WINDOW_BASE], env);
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}
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}
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void HELPER(window_check)(uint32_t pc, uint32_t w)
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{
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uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
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uint32_t windowstart = env->sregs[WINDOW_START];
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uint32_t m, n;
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if ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) {
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return;
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}
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for (n = 1; ; ++n) {
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if (n > w) {
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return;
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}
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if (windowstart & windowstart_bit(windowbase + n, env)) {
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break;
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}
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}
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m = windowbase_bound(windowbase + n, env);
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rotate_window(n);
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env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
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(windowbase << PS_OWB_SHIFT) | PS_EXCM;
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env->sregs[EPC1] = env->pc = pc;
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if (windowstart & windowstart_bit(m + 1, env)) {
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HELPER(exception)(EXC_WINDOW_OVERFLOW4);
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} else if (windowstart & windowstart_bit(m + 2, env)) {
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HELPER(exception)(EXC_WINDOW_OVERFLOW8);
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} else {
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HELPER(exception)(EXC_WINDOW_OVERFLOW12);
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}
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}
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uint32_t HELPER(retw)(uint32_t pc)
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{
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int n = (env->regs[0] >> 30) & 0x3;
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int m = 0;
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uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
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uint32_t windowstart = env->sregs[WINDOW_START];
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uint32_t ret_pc = 0;
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if (windowstart & windowstart_bit(windowbase - 1, env)) {
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m = 1;
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} else if (windowstart & windowstart_bit(windowbase - 2, env)) {
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m = 2;
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} else if (windowstart & windowstart_bit(windowbase - 3, env)) {
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m = 3;
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}
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if (n == 0 || (m != 0 && m != n) ||
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((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) != 0) {
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qemu_log("Illegal retw instruction(pc = %08x), "
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"PS = %08x, m = %d, n = %d\n",
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pc, env->sregs[PS], m, n);
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HELPER(exception_cause)(pc, ILLEGAL_INSTRUCTION_CAUSE);
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} else {
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int owb = windowbase;
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ret_pc = (pc & 0xc0000000) | (env->regs[0] & 0x3fffffff);
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rotate_window(-n);
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if (windowstart & windowstart_bit(env->sregs[WINDOW_BASE], env)) {
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env->sregs[WINDOW_START] &= ~windowstart_bit(owb, env);
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} else {
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/* window underflow */
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env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
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(windowbase << PS_OWB_SHIFT) | PS_EXCM;
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env->sregs[EPC1] = env->pc = pc;
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if (n == 1) {
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HELPER(exception)(EXC_WINDOW_UNDERFLOW4);
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} else if (n == 2) {
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HELPER(exception)(EXC_WINDOW_UNDERFLOW8);
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} else if (n == 3) {
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HELPER(exception)(EXC_WINDOW_UNDERFLOW12);
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}
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}
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}
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return ret_pc;
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}
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void HELPER(rotw)(uint32_t imm4)
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{
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rotate_window(imm4);
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}
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void HELPER(restore_owb)(void)
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{
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rotate_window_abs((env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT);
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}
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void HELPER(movsp)(uint32_t pc)
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{
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if ((env->sregs[WINDOW_START] &
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(windowstart_bit(env->sregs[WINDOW_BASE] - 3, env) |
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windowstart_bit(env->sregs[WINDOW_BASE] - 2, env) |
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windowstart_bit(env->sregs[WINDOW_BASE] - 1, env))) == 0) {
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HELPER(exception_cause)(pc, ALLOCA_CAUSE);
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}
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}
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void HELPER(wsr_lbeg)(uint32_t v)
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{
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if (env->sregs[LBEG] != v) {
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tb_invalidate_phys_page_range(
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env->sregs[LEND] - 1, env->sregs[LEND], 0);
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env->sregs[LBEG] = v;
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}
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}
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void HELPER(wsr_lend)(uint32_t v)
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{
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if (env->sregs[LEND] != v) {
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tb_invalidate_phys_page_range(
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env->sregs[LEND] - 1, env->sregs[LEND], 0);
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env->sregs[LEND] = v;
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tb_invalidate_phys_page_range(
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env->sregs[LEND] - 1, env->sregs[LEND], 0);
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}
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}
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void HELPER(dump_state)(void)
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{
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cpu_dump_state(env, stderr, fprintf, 0);
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}
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