798b0c25cc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@890 c046a42c-6fe2-441c-8c8c-71466251a162
123 lines
4.4 KiB
C
123 lines
4.4 KiB
C
/*
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* QEMU internal VGA defines.
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#define MSR_COLOR_EMULATION 0x01
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#define MSR_PAGE_SELECT 0x20
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#define ST01_V_RETRACE 0x08
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#define ST01_DISP_ENABLE 0x01
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/* bochs VBE support */
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#define CONFIG_BOCHS_VBE
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#define VBE_DISPI_MAX_XRES 1024
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#define VBE_DISPI_MAX_YRES 768
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#define VBE_DISPI_INDEX_ID 0x0
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#define VBE_DISPI_INDEX_XRES 0x1
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#define VBE_DISPI_INDEX_YRES 0x2
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#define VBE_DISPI_INDEX_BPP 0x3
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#define VBE_DISPI_INDEX_ENABLE 0x4
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#define VBE_DISPI_INDEX_BANK 0x5
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#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
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#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
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#define VBE_DISPI_INDEX_X_OFFSET 0x8
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#define VBE_DISPI_INDEX_Y_OFFSET 0x9
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#define VBE_DISPI_INDEX_NB 0xa
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#define VBE_DISPI_ID0 0xB0C0
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#define VBE_DISPI_ID1 0xB0C1
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#define VBE_DISPI_ID2 0xB0C2
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#define VBE_DISPI_DISABLED 0x00
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#define VBE_DISPI_ENABLED 0x01
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#define VBE_DISPI_LFB_ENABLED 0x40
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#define VBE_DISPI_NOCLEARMEM 0x80
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#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
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typedef struct VGAState {
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uint8_t *vram_ptr;
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unsigned long vram_offset;
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unsigned int vram_size;
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uint32_t latch;
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uint8_t sr_index;
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uint8_t sr[256];
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uint8_t gr_index;
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uint8_t gr[256];
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uint8_t ar_index;
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uint8_t ar[21];
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int ar_flip_flop;
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uint8_t cr_index;
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uint8_t cr[256]; /* CRT registers */
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uint8_t msr; /* Misc Output Register */
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uint8_t fcr; /* Feature Control Register */
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uint8_t st00; /* status 0 */
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uint8_t st01; /* status 1 */
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uint8_t dac_state;
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uint8_t dac_sub_index;
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uint8_t dac_read_index;
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uint8_t dac_write_index;
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uint8_t dac_cache[3]; /* used when writing */
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uint8_t palette[768];
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int32_t bank_offset;
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int (*get_bpp)(struct VGAState *s);
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void (*get_offsets)(struct VGAState *s,
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uint32_t *pline_offset,
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uint32_t *pstart_addr);
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#ifdef CONFIG_BOCHS_VBE
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uint16_t vbe_index;
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uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
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uint32_t vbe_start_addr;
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uint32_t vbe_line_offset;
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uint32_t vbe_bank_mask;
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#endif
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/* display refresh support */
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DisplayState *ds;
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uint32_t font_offsets[2];
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int graphic_mode;
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uint8_t shift_control;
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uint8_t double_scan;
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uint32_t line_offset;
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uint32_t line_compare;
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uint32_t start_addr;
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uint8_t last_cw, last_ch;
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uint32_t last_width, last_height; /* in chars or pixels */
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uint32_t last_scr_width, last_scr_height; /* in pixels */
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uint8_t cursor_start, cursor_end;
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uint32_t cursor_offset;
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unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned b);
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/* tell for each page if it has been updated since the last time */
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uint32_t last_palette[256];
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#define CH_ATTR_SIZE (160 * 100)
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uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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} VGAState;
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void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
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unsigned long vga_ram_offset, int vga_ram_size);
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uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
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void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
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extern const uint8_t sr_mask[8];
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extern const uint8_t gr_mask[16];
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