git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@13 c046a42c-6fe2-441c-8c8c-71466251a162
1098 lines
21 KiB
C
1098 lines
21 KiB
C
typedef unsigned char uint8_t;
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typedef unsigned short uint16_t;
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typedef unsigned int uint32_t;
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typedef unsigned long long uint64_t;
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typedef signed char int8_t;
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typedef signed short int16_t;
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typedef signed int int32_t;
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typedef signed long long int64_t;
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#ifdef __i386__
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register int T0 asm("esi");
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register int T1 asm("ebx");
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register int A0 asm("edi");
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register struct CPU86State *env asm("ebp");
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#define FORCE_RET() asm volatile ("ret");
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#endif
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#ifdef __powerpc__
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register int T0 asm("r24");
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register int T1 asm("r25");
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register int A0 asm("r26");
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register struct CPU86State *env asm("r27");
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#define FORCE_RET() asm volatile ("blr");
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#endif
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#ifdef __arm__
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register int T0 asm("r4");
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register int T1 asm("r5");
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register int A0 asm("r6");
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register struct CPU86State *env asm("r7");
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#define FORCE_RET() asm volatile ("mov pc, lr");
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#endif
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#ifdef __mips__
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register int T0 asm("s0");
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register int T1 asm("s1");
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register int A0 asm("s2");
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register struct CPU86State *env asm("s3");
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#define FORCE_RET() asm volatile ("jr $31");
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#endif
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#ifdef __sparc__
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register int T0 asm("l0");
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register int T1 asm("l1");
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register int A0 asm("l2");
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register struct CPU86State *env asm("l3");
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#define FORCE_RET() asm volatile ("retl ; nop");
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#endif
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#ifndef OPPROTO
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#define OPPROTO
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#endif
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define EAX (env->regs[R_EAX])
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#define ECX (env->regs[R_ECX])
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#define EDX (env->regs[R_EDX])
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#define EBX (env->regs[R_EBX])
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#define ESP (env->regs[R_ESP])
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#define EBP (env->regs[R_EBP])
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#define ESI (env->regs[R_ESI])
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#define EDI (env->regs[R_EDI])
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#define PC (env->pc)
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#define DF (env->df)
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#define CC_SRC (env->cc_src)
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#define CC_DST (env->cc_dst)
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#define CC_OP (env->cc_op)
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extern int __op_param1, __op_param2, __op_param3;
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#define PARAM1 ((long)(&__op_param1))
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#define PARAM2 ((long)(&__op_param2))
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#define PARAM3 ((long)(&__op_param3))
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#include "cpu-i386.h"
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typedef struct CCTable {
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int (*compute_c)(void); /* return the C flag */
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int (*compute_z)(void); /* return the Z flag */
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int (*compute_s)(void); /* return the S flag */
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int (*compute_o)(void); /* return the O flag */
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int (*compute_all)(void); /* return all the flags */
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} CCTable;
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uint8_t parity_table[256] = {
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
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0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
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};
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static int compute_eflags_all(void)
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{
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return CC_SRC;
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}
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static int compute_eflags_addb(void)
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{
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int cf, pf, af, zf, sf, of;
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int src1, src2;
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src1 = CC_SRC;
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src2 = CC_DST - CC_SRC;
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cf = (uint8_t)CC_DST < (uint8_t)src1;
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pf = parity_table[(uint8_t)CC_DST];
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af = (CC_DST ^ src1 ^ src2) & 0x10;
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = ((src1 ^ src2 ^ -1) & (src1 ^ CC_DST) & 0x80) << 4;
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_subb(void)
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{
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int cf, pf, af, zf, sf, of;
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int src1, src2;
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src1 = CC_SRC;
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src2 = CC_SRC - CC_DST;
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cf = (uint8_t)src1 < (uint8_t)src2;
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pf = parity_table[(uint8_t)CC_DST];
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af = (CC_DST ^ src1 ^ src2) & 0x10;
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = ((src1 ^ src2 ^ -1) & (src1 ^ CC_DST) & 0x80) << 4;
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_logicb(void)
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{
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cf = 0;
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pf = parity_table[(uint8_t)CC_DST];
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af = 0;
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = 0;
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_incb(void)
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{
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int cf, pf, af, zf, sf, of;
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int src2;
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src1 = CC_DST - 1;
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src2 = 1;
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cf = CC_SRC;
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pf = parity_table[(uint8_t)CC_DST];
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af = (CC_DST ^ src1 ^ src2) & 0x10;
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = ((src1 ^ src2 ^ -1) & (src1 ^ CC_DST) & 0x80) << 4;
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_decb(void)
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{
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int cf, pf, af, zf, sf, of;
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int src1, src2;
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src1 = CC_DST + 1;
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src2 = 1;
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cf = (uint8_t)src1 < (uint8_t)src2;
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pf = parity_table[(uint8_t)CC_DST];
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af = (CC_DST ^ src1 ^ src2) & 0x10;
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = ((src1 ^ src2 ^ -1) & (src1 ^ CC_DST) & 0x80) << 4;
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_shlb(void)
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{
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cf = CC_SRC;
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pf = parity_table[(uint8_t)CC_DST];
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af = 0; /* undefined */
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = 0; /* undefined */
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_shrb(void)
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{
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cf = CC_SRC & 1;
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pf = parity_table[(uint8_t)CC_DST];
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af = 0; /* undefined */
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zf = ((uint8_t)CC_DST != 0) << 6;
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sf = CC_DST & 0x80;
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of = sf << 4;
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return cf | pf | af | zf | sf | of;
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}
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static int compute_eflags_mul(void)
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{
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cf = (CC_SRC != 0);
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pf = 0; /* undefined */
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af = 0; /* undefined */
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zf = 0; /* undefined */
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sf = 0; /* undefined */
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of = cf << 11;
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return cf | pf | af | zf | sf | of;
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}
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CTable cc_table[CC_OP_NB] = {
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[CC_OP_DYNAMIC] = { NULL, NULL, NULL },
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[CC_OP_EFLAGS] = { NULL, NULL, NULL },
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};
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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/* operations */
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void OPPROTO op_addl_T0_T1_cc(void)
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{
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CC_SRC = T0;
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T0 += T1;
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CC_DST = T0;
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}
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void OPPROTO op_orl_T0_T1_cc(void)
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{
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T0 |= T1;
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CC_DST = T0;
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}
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void OPPROTO op_adcl_T0_T1_cc(void)
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{
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CC_SRC = T0;
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T0 = T0 + T1 + cc_table[CC_OP].compute_c();
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CC_DST = T0;
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}
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void OPPROTO op_sbbl_T0_T1_cc(void)
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{
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CC_SRC = T0;
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T0 = T0 - T1 - cc_table[CC_OP].compute_c();
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CC_DST = T0;
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}
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void OPPROTO op_andl_T0_T1_cc(void)
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{
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T0 &= T1;
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CC_DST = T0;
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}
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void OPPROTO op_subl_T0_T1_cc(void)
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{
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CC_SRC = T0;
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T0 -= T1;
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CC_DST = T0;
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}
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void OPPROTO op_xorl_T0_T1_cc(void)
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{
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T0 ^= T1;
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CC_DST = T0;
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}
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void OPPROTO op_cmpl_T0_T1_cc(void)
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{
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CC_SRC = T0;
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CC_DST = T0 - T1;
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}
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void OPPROTO op_notl_T0(void)
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{
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T0 = ~T0;
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}
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void OPPROTO op_negl_T0_cc(void)
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{
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CC_SRC = 0;
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T0 = -T0;
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CC_DST = T0;
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}
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void OPPROTO op_incl_T0_cc(void)
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{
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T0++;
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CC_DST = T0;
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}
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void OPPROTO op_decl_T0_cc(void)
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{
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T0--;
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CC_DST = T0;
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}
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void OPPROTO op_testl_T0_T1_cc(void)
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{
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CC_SRC = T0;
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CC_DST = T0 & T1;
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}
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/* shifts */
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void OPPROTO op_roll_T0_T1_cc(void)
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{
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int count;
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count = T1 & 0x1f;
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if (count) {
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CC_SRC = T0;
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T0 = (T0 << count) | (T0 >> (32 - count));
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CC_DST = T0;
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CC_OP = CC_OP_ROLL;
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}
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}
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void OPPROTO op_rolw_T0_T1_cc(void)
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{
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int count;
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count = T1 & 0xf;
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if (count) {
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T0 = T0 & 0xffff;
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CC_SRC = T0;
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T0 = (T0 << count) | (T0 >> (16 - count));
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CC_DST = T0;
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CC_OP = CC_OP_ROLW;
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}
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}
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void OPPROTO op_rolb_T0_T1_cc(void)
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{
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int count;
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count = T1 & 0x7;
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if (count) {
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T0 = T0 & 0xff;
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CC_SRC = T0;
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T0 = (T0 << count) | (T0 >> (8 - count));
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CC_DST = T0;
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CC_OP = CC_OP_ROLB;
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}
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}
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void OPPROTO op_rorl_T0_T1_cc(void)
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{
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int count;
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count = T1 & 0x1f;
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if (count) {
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CC_SRC = T0;
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T0 = (T0 >> count) | (T0 << (32 - count));
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CC_DST = T0;
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CC_OP = CC_OP_RORB;
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}
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}
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void OPPROTO op_rorw_T0_T1_cc(void)
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{
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int count;
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count = T1 & 0xf;
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if (count) {
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CC_SRC = T0;
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T0 = (T0 >> count) | (T0 << (16 - count));
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CC_DST = T0;
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CC_OP = CC_OP_RORW;
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}
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}
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void OPPROTO op_rorb_T0_T1_cc(void)
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{
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int count;
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count = T1 & 0x7;
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if (count) {
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CC_SRC = T0;
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T0 = (T0 >> count) | (T0 << (8 - count));
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CC_DST = T0;
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CC_OP = CC_OP_RORL;
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}
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}
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/* modulo 17 table */
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const uint8_t rclw_table[32] = {
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0, 1, 2, 3, 4, 5, 6, 7,
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8, 9,10,11,12,13,14,15,
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16, 0, 1, 2, 3, 4, 5, 6,
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7, 8, 9,10,11,12,13,14,
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};
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/* modulo 9 table */
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const uint8_t rclb_table[32] = {
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0, 1, 2, 3, 4, 5, 6, 7,
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8, 0, 1, 2, 3, 4, 5, 6,
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7, 8, 0, 1, 2, 3, 4, 5,
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6, 7, 8, 0, 1, 2, 3, 4,
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};
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void helper_rcll_T0_T1_cc(void)
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{
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int count, res;
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count = T1 & 0x1f;
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if (count) {
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CC_SRC = T0;
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res = (T0 << count) | (cc_table[CC_OP].compute_c() << (count - 1));
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if (count > 1)
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res |= T0 >> (33 - count);
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T0 = res;
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CC_DST = T0 ^ CC_SRC; /* O is in bit 31 */
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CC_SRC >>= (32 - count); /* CC is in bit 0 */
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CC_OP = CC_OP_RCLL;
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}
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}
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void OPPROTO op_rcll_T0_T1_cc(void)
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{
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helper_rcll_T0_T1_cc();
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}
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void OPPROTO op_rclw_T0_T1_cc(void)
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{
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int count;
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count = rclw_table[T1 & 0x1f];
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if (count) {
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|
T0 = T0 & 0xffff;
|
|
CC_SRC = T0;
|
|
T0 = (T0 << count) | (cc_table[CC_OP].compute_c() << (count - 1)) |
|
|
(T0 >> (17 - count));
|
|
CC_DST = T0 ^ CC_SRC;
|
|
CC_SRC >>= (16 - count);
|
|
CC_OP = CC_OP_RCLW;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_rclb_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = rclb_table[T1 & 0x1f];
|
|
if (count) {
|
|
T0 = T0 & 0xff;
|
|
CC_SRC = T0;
|
|
T0 = (T0 << count) | (cc_table[CC_OP].compute_c() << (count - 1)) |
|
|
(T0 >> (9 - count));
|
|
CC_DST = T0 ^ CC_SRC;
|
|
CC_SRC >>= (8 - count);
|
|
CC_OP = CC_OP_RCLB;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_rcrl_T0_T1_cc(void)
|
|
{
|
|
int count, res;
|
|
count = T1 & 0x1f;
|
|
if (count) {
|
|
CC_SRC = T0;
|
|
res = (T0 >> count) | (cc_table[CC_OP].compute_c() << (32 - count));
|
|
if (count > 1)
|
|
res |= T0 << (33 - count);
|
|
T0 = res;
|
|
CC_DST = T0 ^ CC_SRC;
|
|
CC_SRC >>= (count - 1);
|
|
CC_OP = CC_OP_RCLL;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_rcrw_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = rclw_table[T1 & 0x1f];
|
|
if (count) {
|
|
T0 = T0 & 0xffff;
|
|
CC_SRC = T0;
|
|
T0 = (T0 >> count) | (cc_table[CC_OP].compute_c() << (16 - count)) |
|
|
(T0 << (17 - count));
|
|
CC_DST = T0 ^ CC_SRC;
|
|
CC_SRC >>= (count - 1);
|
|
CC_OP = CC_OP_RCLW;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_rcrb_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = rclb_table[T1 & 0x1f];
|
|
if (count) {
|
|
T0 = T0 & 0xff;
|
|
CC_SRC = T0;
|
|
T0 = (T0 >> count) | (cc_table[CC_OP].compute_c() << (8 - count)) |
|
|
(T0 << (9 - count));
|
|
CC_DST = T0 ^ CC_SRC;
|
|
CC_SRC >>= (count - 1);
|
|
CC_OP = CC_OP_RCLB;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_shll_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count == 1) {
|
|
CC_SRC = T0;
|
|
T0 = T0 << 1;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_ADDL;
|
|
} else if (count) {
|
|
CC_SRC = T0 >> (32 - count);
|
|
T0 = T0 << count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLL;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_shlw_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count == 1) {
|
|
CC_SRC = T0;
|
|
T0 = T0 << 1;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_ADDW;
|
|
} else if (count) {
|
|
CC_SRC = T0 >> (16 - count);
|
|
T0 = T0 << count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLW;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_shlb_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count == 1) {
|
|
CC_SRC = T0;
|
|
T0 = T0 << 1;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_ADDB;
|
|
} else if (count) {
|
|
CC_SRC = T0 >> (8 - count);
|
|
T0 = T0 << count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLB;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_shrl_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count == 1) {
|
|
CC_SRC = T0;
|
|
T0 = T0 >> 1;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHRL;
|
|
} else if (count) {
|
|
CC_SRC = T0 >> (count - 1);
|
|
T0 = T0 >> count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLL;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_shrw_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count == 1) {
|
|
T0 = T0 & 0xffff;
|
|
CC_SRC = T0;
|
|
T0 = T0 >> 1;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHRW;
|
|
} else if (count) {
|
|
T0 = T0 & 0xffff;
|
|
CC_SRC = T0 >> (count - 1);
|
|
T0 = T0 >> count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLW;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_shrb_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count == 1) {
|
|
T0 = T0 & 0xff;
|
|
CC_SRC = T0;
|
|
T0 = T0 >> 1;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHRB;
|
|
} else if (count) {
|
|
T0 = T0 & 0xff;
|
|
CC_SRC = T0 >> (count - 1);
|
|
T0 = T0 >> count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLB;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_sarl_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count) {
|
|
CC_SRC = (int32_t)T0 >> (count - 1);
|
|
T0 = (int32_t)T0 >> count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLL;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_sarw_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count) {
|
|
CC_SRC = (int16_t)T0 >> (count - 1);
|
|
T0 = (int16_t)T0 >> count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLW;
|
|
}
|
|
}
|
|
|
|
void OPPROTO op_sarb_T0_T1_cc(void)
|
|
{
|
|
int count;
|
|
count = T1 & 0x1f;
|
|
if (count) {
|
|
CC_SRC = (int8_t)T0 >> (count - 1);
|
|
T0 = (int8_t)T0 >> count;
|
|
CC_DST = T0;
|
|
CC_OP = CC_OP_SHLB;
|
|
}
|
|
}
|
|
|
|
/* multiply/divide */
|
|
void OPPROTO op_mulb_AL_T0(void)
|
|
{
|
|
unsigned int res;
|
|
res = (uint8_t)EAX * (uint8_t)T0;
|
|
EAX = (EAX & 0xffff0000) | res;
|
|
CC_SRC = (res & 0xff00);
|
|
}
|
|
|
|
void OPPROTO op_imulb_AL_T0(void)
|
|
{
|
|
int res;
|
|
res = (int8_t)EAX * (int8_t)T0;
|
|
EAX = (EAX & 0xffff0000) | (res & 0xffff);
|
|
CC_SRC = (res != (int8_t)res);
|
|
}
|
|
|
|
void OPPROTO op_mulw_AX_T0(void)
|
|
{
|
|
unsigned int res;
|
|
res = (uint16_t)EAX * (uint16_t)T0;
|
|
EAX = (EAX & 0xffff0000) | (res & 0xffff);
|
|
EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
|
|
CC_SRC = res >> 16;
|
|
}
|
|
|
|
void OPPROTO op_imulw_AX_T0(void)
|
|
{
|
|
int res;
|
|
res = (int16_t)EAX * (int16_t)T0;
|
|
EAX = (EAX & 0xffff0000) | (res & 0xffff);
|
|
EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
|
|
CC_SRC = (res != (int16_t)res);
|
|
}
|
|
|
|
void OPPROTO op_mull_EAX_T0(void)
|
|
{
|
|
uint64_t res;
|
|
res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
|
|
EAX = res;
|
|
EDX = res >> 32;
|
|
CC_SRC = res >> 32;
|
|
}
|
|
|
|
void OPPROTO op_imull_EAX_T0(void)
|
|
{
|
|
int64_t res;
|
|
res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
|
|
EAX = res;
|
|
EDX = res >> 32;
|
|
CC_SRC = (res != (int32_t)res);
|
|
}
|
|
|
|
void OPPROTO op_imulw_T0_T1(void)
|
|
{
|
|
int res;
|
|
res = (int16_t)T0 * (int16_t)T1;
|
|
T0 = res;
|
|
CC_SRC = (res != (int16_t)res);
|
|
}
|
|
|
|
void OPPROTO op_imull_T0_T1(void)
|
|
{
|
|
int64_t res;
|
|
res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T1);
|
|
T0 = res;
|
|
CC_SRC = (res != (int32_t)res);
|
|
}
|
|
|
|
/* division, flags are undefined */
|
|
/* XXX: add exceptions for overflow & div by zero */
|
|
void OPPROTO op_divb_AL_T0(void)
|
|
{
|
|
unsigned int num, den, q, r;
|
|
|
|
num = (EAX & 0xffff);
|
|
den = (T0 & 0xff);
|
|
q = (num / den) & 0xff;
|
|
r = (num % den) & 0xff;
|
|
EAX = (EAX & 0xffff0000) | (r << 8) | q;
|
|
}
|
|
|
|
void OPPROTO op_idivb_AL_T0(void)
|
|
{
|
|
int num, den, q, r;
|
|
|
|
num = (int16_t)EAX;
|
|
den = (int8_t)T0;
|
|
q = (num / den) & 0xff;
|
|
r = (num % den) & 0xff;
|
|
EAX = (EAX & 0xffff0000) | (r << 8) | q;
|
|
}
|
|
|
|
void OPPROTO op_divw_AX_T0(void)
|
|
{
|
|
unsigned int num, den, q, r;
|
|
|
|
num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
|
|
den = (T0 & 0xffff);
|
|
q = (num / den) & 0xffff;
|
|
r = (num % den) & 0xffff;
|
|
EAX = (EAX & 0xffff0000) | q;
|
|
EDX = (EDX & 0xffff0000) | r;
|
|
}
|
|
|
|
void OPPROTO op_idivw_AX_T0(void)
|
|
{
|
|
int num, den, q, r;
|
|
|
|
num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
|
|
den = (int16_t)T0;
|
|
q = (num / den) & 0xffff;
|
|
r = (num % den) & 0xffff;
|
|
EAX = (EAX & 0xffff0000) | q;
|
|
EDX = (EDX & 0xffff0000) | r;
|
|
}
|
|
|
|
void OPPROTO op_divl_EAX_T0(void)
|
|
{
|
|
unsigned int den, q, r;
|
|
uint64_t num;
|
|
|
|
num = EAX | ((uint64_t)EDX << 32);
|
|
den = T0;
|
|
q = (num / den);
|
|
r = (num % den);
|
|
EAX = q;
|
|
EDX = r;
|
|
}
|
|
|
|
void OPPROTO op_idivl_EAX_T0(void)
|
|
{
|
|
int den, q, r;
|
|
int16_t num;
|
|
|
|
num = EAX | ((uint64_t)EDX << 32);
|
|
den = (int16_t)T0;
|
|
q = (num / den);
|
|
r = (num % den);
|
|
EAX = q;
|
|
EDX = r;
|
|
}
|
|
|
|
/* constant load */
|
|
|
|
void OPPROTO op1_movl_T0_im(void)
|
|
{
|
|
T0 = PARAM1;
|
|
}
|
|
|
|
void OPPROTO op1_movl_T1_im(void)
|
|
{
|
|
T1 = PARAM1;
|
|
}
|
|
|
|
void OPPROTO op1_movl_A0_im(void)
|
|
{
|
|
A0 = PARAM1;
|
|
}
|
|
|
|
/* memory access */
|
|
|
|
void OPPROTO op_ldub_T0_A0(void)
|
|
{
|
|
T0 = ldub((uint8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldsb_T0_A0(void)
|
|
{
|
|
T0 = ldsb((int8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_lduw_T0_A0(void)
|
|
{
|
|
T0 = lduw((uint8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldsw_T0_A0(void)
|
|
{
|
|
T0 = ldsw((int8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldl_T0_A0(void)
|
|
{
|
|
T0 = ldl((uint8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldub_T1_A0(void)
|
|
{
|
|
T1 = ldub((uint8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldsb_T1_A0(void)
|
|
{
|
|
T1 = ldsb((int8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_lduw_T1_A0(void)
|
|
{
|
|
T1 = lduw((uint8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldsw_T1_A0(void)
|
|
{
|
|
T1 = ldsw((int8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_ldl_T1_A0(void)
|
|
{
|
|
T1 = ldl((uint8_t *)A0);
|
|
}
|
|
|
|
void OPPROTO op_stb_T0_A0(void)
|
|
{
|
|
stb((uint8_t *)A0, T0);
|
|
}
|
|
|
|
void OPPROTO op_stw_T0_A0(void)
|
|
{
|
|
stw((uint8_t *)A0, T0);
|
|
}
|
|
|
|
void OPPROTO op_stl_T0_A0(void)
|
|
{
|
|
stl((uint8_t *)A0, T0);
|
|
}
|
|
|
|
/* flags */
|
|
|
|
void OPPROTO op_set_cc_op(void)
|
|
{
|
|
CC_OP = PARAM1;
|
|
}
|
|
|
|
void OPPROTO op_movl_eflags_T0(void)
|
|
{
|
|
CC_SRC = T0;
|
|
DF = (T0 & DIRECTION_FLAG) ? -1 : 1;
|
|
}
|
|
|
|
void OPPROTO op_movb_eflags_T0(void)
|
|
{
|
|
int cc_o;
|
|
cc_o = cc_table[CC_OP].compute_o();
|
|
CC_SRC = T0 | (cc_o << 11);
|
|
}
|
|
|
|
void OPPROTO op_movl_T0_eflags(void)
|
|
{
|
|
cc_table[CC_OP].compute_eflags();
|
|
}
|
|
|
|
void OPPROTO op_cld(void)
|
|
{
|
|
DF = 1;
|
|
}
|
|
|
|
void OPPROTO op_std(void)
|
|
{
|
|
DF = -1;
|
|
}
|
|
|
|
/* jumps */
|
|
|
|
/* indirect jump */
|
|
void OPPROTO op_jmp_T0(void)
|
|
{
|
|
PC = T0;
|
|
}
|
|
|
|
void OPPROTO op_jmp_im(void)
|
|
{
|
|
PC = PARAM1;
|
|
}
|
|
|
|
void OPPROTO op_jne_b(void)
|
|
{
|
|
if ((uint8_t)CC_DST != 0)
|
|
PC += PARAM1;
|
|
else
|
|
PC += PARAM2;
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_jne_w(void)
|
|
{
|
|
if ((uint16_t)CC_DST != 0)
|
|
PC += PARAM1;
|
|
else
|
|
PC += PARAM2;
|
|
FORCE_RET();
|
|
}
|
|
|
|
void OPPROTO op_jne_l(void)
|
|
{
|
|
if (CC_DST != 0)
|
|
PC += PARAM1;
|
|
else
|
|
PC += PARAM2;
|
|
FORCE_RET(); /* generate a return so that gcc does not generate an
|
|
early function return */
|
|
}
|
|
|
|
/* string ops */
|
|
|
|
#define ldul ldl
|
|
|
|
#define SUFFIX b
|
|
#define SHIFT 0
|
|
#include "opstring_template.h"
|
|
#undef SUFFIX
|
|
#undef SHIFT
|
|
|
|
#define SUFFIX w
|
|
#define SHIFT 1
|
|
#include "opstring_template.h"
|
|
#undef SUFFIX
|
|
#undef SHIFT
|
|
|
|
#define SUFFIX l
|
|
#define SHIFT 2
|
|
#include "opstring_template.h"
|
|
#undef SUFFIX
|
|
#undef SHIFT
|
|
|
|
/* sign extend */
|
|
|
|
void OPPROTO op_movsbl_T0_T0(void)
|
|
{
|
|
T0 = (int8_t)T0;
|
|
}
|
|
|
|
void OPPROTO op_movzbl_T0_T0(void)
|
|
{
|
|
T0 = (uint8_t)T0;
|
|
}
|
|
|
|
void OPPROTO op_movswl_T0_T0(void)
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{
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T0 = (int16_t)T0;
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}
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void OPPROTO op_movzwl_T0_T0(void)
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{
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T0 = (uint16_t)T0;
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}
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void OPPROTO op_movswl_EAX_AX(void)
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{
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EAX = (int16_t)EAX;
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}
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void OPPROTO op_movsbw_AX_AL(void)
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{
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EAX = (EAX & 0xffff0000) | ((int8_t)EAX & 0xffff);
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}
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void OPPROTO op_movslq_EDX_EAX(void)
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{
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EDX = (int32_t)EAX >> 31;
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}
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void OPPROTO op_movswl_DX_AX(void)
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{
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EDX = (EDX & 0xffff0000) | (((int16_t)EAX >> 15) & 0xffff);
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}
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/* push/pop */
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/* XXX: add 16 bit operand/16 bit seg variants */
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void op_pushl_T0(void)
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{
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uint32_t offset;
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offset = ESP - 4;
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stl((void *)offset, T0);
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/* modify ESP after to handle exceptions correctly */
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ESP = offset;
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}
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void op_pushl_T1(void)
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{
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uint32_t offset;
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offset = ESP - 4;
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stl((void *)offset, T1);
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/* modify ESP after to handle exceptions correctly */
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ESP = offset;
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}
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void op_popl_T0(void)
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{
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T0 = ldl((void *)ESP);
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ESP += 4;
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}
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void op_addl_ESP_im(void)
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{
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ESP += PARAM1;
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}
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