Some CPUs are of an opposite data-endianness to other components in the system. Sometimes elfs have the data sections layed out with this CPU data-endianness accounting for when loaded via the CPU, so byte swaps (relative to other system components) will occur. The leading example, is ARM's BE32 mode, which is is basically LE with address manipulation on half-word and byte accesses to access the hw/byte reversed address. This means that word data is invariant across LE and BE32. This also means that instructions are still LE. The expectation is that the elf will be loaded via the CPU in this endianness scheme, which means the data in the elf is reversed at compile time. As QEMU loads via the system memory directly, rather than the CPU, we need a mechanism to reverse elf data endianness to implement this possibility. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
182 lines
5.6 KiB
C
182 lines
5.6 KiB
C
/*
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* QEMU Alpha DP264/CLIPPER hardware system emulator.
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*
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* Choose CLIPPER IRQ mappings over, say, DP264, MONET, or WEBBRICK
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* variants because CLIPPER doesn't have an SMC669 SuperIO controller
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* that we need to emulate as well.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "elf.h"
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#include "hw/loader.h"
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#include "hw/boards.h"
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#include "alpha_sys.h"
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#include "qemu/error-report.h"
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#include "sysemu/sysemu.h"
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#include "hw/timer/mc146818rtc.h"
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#include "hw/ide.h"
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#include "hw/timer/i8254.h"
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#include "hw/char/serial.h"
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#define MAX_IDE_BUS 2
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static uint64_t cpu_alpha_superpage_to_phys(void *opaque, uint64_t addr)
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{
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if (((addr >> 41) & 3) == 2) {
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addr &= 0xffffffffffull;
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}
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return addr;
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}
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/* Note that there are at least 3 viewpoints of IRQ numbers on Alpha systems.
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(0) The dev_irq_n lines into the cpu, which we totally ignore,
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(1) The DRIR lines in the typhoon chipset,
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(2) The "vector" aka mangled interrupt number reported by SRM PALcode,
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(3) The interrupt number assigned by the kernel.
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The following function is concerned with (1) only. */
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static int clipper_pci_map_irq(PCIDevice *d, int irq_num)
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{
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int slot = d->devfn >> 3;
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assert(irq_num >= 0 && irq_num <= 3);
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return (slot + 1) * 4 + irq_num;
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}
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static void clipper_init(MachineState *machine)
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{
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ram_addr_t ram_size = machine->ram_size;
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const char *cpu_model = machine->cpu_model;
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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AlphaCPU *cpus[4];
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PCIBus *pci_bus;
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ISABus *isa_bus;
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qemu_irq rtc_irq;
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long size, i;
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char *palcode_filename;
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uint64_t palcode_entry, palcode_low, palcode_high;
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uint64_t kernel_entry, kernel_low, kernel_high;
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/* Create up to 4 cpus. */
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memset(cpus, 0, sizeof(cpus));
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for (i = 0; i < smp_cpus; ++i) {
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cpus[i] = cpu_alpha_init(cpu_model ? cpu_model : "ev67");
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}
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cpus[0]->env.trap_arg0 = ram_size;
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cpus[0]->env.trap_arg1 = 0;
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cpus[0]->env.trap_arg2 = smp_cpus;
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/* Init the chipset. */
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pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus,
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clipper_pci_map_irq);
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/* Since we have an SRM-compatible PALcode, use the SRM epoch. */
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rtc_init(isa_bus, 1900, rtc_irq);
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pit_init(isa_bus, 0x40, 0, NULL);
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isa_create_simple(isa_bus, "i8042");
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/* VGA setup. Don't bother loading the bios. */
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pci_vga_init(pci_bus);
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/* Serial code setup. */
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serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);
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/* Network setup. e1000 is good enough, failing Tulip support. */
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for (i = 0; i < nb_nics; i++) {
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pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
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}
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/* IDE disk setup. */
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{
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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ide_drive_get(hd, ARRAY_SIZE(hd));
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pci_cmd646_ide_init(pci_bus, hd, 0);
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}
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/* Load PALcode. Given that this is not "real" cpu palcode,
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but one explicitly written for the emulation, we might as
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well load it directly from and ELF image. */
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palcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
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bios_name ? bios_name : "palcode-clipper");
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if (palcode_filename == NULL) {
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error_report("no palcode provided");
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exit(1);
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}
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size = load_elf(palcode_filename, cpu_alpha_superpage_to_phys,
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NULL, &palcode_entry, &palcode_low, &palcode_high,
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0, EM_ALPHA, 0, 0);
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if (size < 0) {
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error_report("could not load palcode '%s'", palcode_filename);
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exit(1);
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}
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g_free(palcode_filename);
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/* Start all cpus at the PALcode RESET entry point. */
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for (i = 0; i < smp_cpus; ++i) {
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cpus[i]->env.pal_mode = 1;
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cpus[i]->env.pc = palcode_entry;
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cpus[i]->env.palbr = palcode_entry;
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}
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/* Load a kernel. */
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if (kernel_filename) {
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uint64_t param_offset;
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size = load_elf(kernel_filename, cpu_alpha_superpage_to_phys,
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NULL, &kernel_entry, &kernel_low, &kernel_high,
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0, EM_ALPHA, 0, 0);
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if (size < 0) {
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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cpus[0]->env.trap_arg1 = kernel_entry;
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param_offset = kernel_low - 0x6000;
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if (kernel_cmdline) {
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pstrcpy_targphys("cmdline", param_offset, 0x100, kernel_cmdline);
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}
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if (initrd_filename) {
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long initrd_base, initrd_size;
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initrd_size = get_image_size(initrd_filename);
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if (initrd_size < 0) {
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error_report("could not load initial ram disk '%s'",
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initrd_filename);
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exit(1);
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}
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/* Put the initrd image as high in memory as possible. */
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initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
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load_image_targphys(initrd_filename, initrd_base,
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ram_size - initrd_base);
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address_space_stq(&address_space_memory, param_offset + 0x100,
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initrd_base + 0xfffffc0000000000ULL,
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MEMTXATTRS_UNSPECIFIED,
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NULL);
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address_space_stq(&address_space_memory, param_offset + 0x108,
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initrd_size, MEMTXATTRS_UNSPECIFIED, NULL);
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}
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}
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}
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static void clipper_machine_init(MachineClass *mc)
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{
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mc->desc = "Alpha DP264/CLIPPER";
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mc->init = clipper_init;
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mc->max_cpus = 4;
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mc->is_default = 1;
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}
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DEFINE_MACHINE("clipper", clipper_machine_init)
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