qemu-patch-raspberry4/target/ppc
Fabiano Rosas 7fc1dc8313 target/ppc: Fix e6500 boot
When Altivec support was added to the e6500 kernel in 2012[1], the
QEMU code was not changed, so we don't register the VPU/VPUA
exceptions for the e6500:

  qemu: fatal: Raised an exception without defined vector 73

Note that the error message says 73, instead of 32, which is the IVOR
for VPU. This is because QEMU knows only knows about the VPU interrupt
for the 7400s. In theory, we should not be raising _that_ VPU
interrupt, but instead another one specific for the e6500.

We unfortunately cannot register e6500-specific VPU/VPUA interrupts
because the SPEU/EFPDI interrupts also use IVOR32/33. These are
present only in the e500v1/2 versions. From the user manual:

e500v1, e500v2: only SPEU/EFPDI/EFPRI
e500mc, e5500:  no SPEU/EFPDI/EFPRI/VPU/VPUA
e6500:          only VPU/VPUA

So I'm leaving IVOR32/33 as SPEU/EFPDI, but altering the dispatch code
to convert the VPU #73 to a #32 when we're in the e6500. Since the
handling for SPEU and VPU is the same this is the only change that's
needed. The EFPDI is not implemented and will cause an abort. I don't
think it worth it changing the error message to take VPUA into
consideration, so I'm not changing anything there.

This bug was discussed in the thread:
https://lists.gnu.org/archive/html/qemu-ppc/2021-06/msg00222.html

1- https://git.kernel.org/torvalds/c/cd66cc2ee52

Reported-by: <mario@locati.it>
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211213133542.2608540-1-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-17 17:57:18 +01:00
..
translate target/ppc: move xscvqpdp to decodetree 2021-12-17 17:57:18 +01:00
arch_dump.c target/ppc: Introduce ppc_interrupts_little_endian() 2021-07-09 10:38:18 +10:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-models.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-models.h target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu.c target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
cpu.h target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
cpu_init.c target/ppc: Fix e6500 boot 2021-12-17 17:57:18 +01:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: Fix e6500 boot 2021-12-17 17:57:18 +01:00
fpu_helper.c target/ppc: move xscvqpdp to decodetree 2021-12-17 17:57:18 +01:00
gdbstub.c target/ppc: Fix XER access in gdbstub 2021-10-21 11:42:47 +11:00
helper.h target/ppc: move xscvqpdp to decodetree 2021-12-17 17:57:18 +01:00
helper_regs.c target/ppc: add MMCR0 PMCC bits to hflags 2021-10-21 11:42:47 +11:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
insn32.decode target/ppc: move xscvqpdp to decodetree 2021-12-17 17:57:18 +01:00
insn64.decode target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
int_helper.c target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
internal.h target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
kvm_ppc.h target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
machine.c target/ppc: updated vscr manipulation in machine.c 2021-05-19 10:30:28 +10:00
mem_helper.c accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
meson.build target/ppc: divided mmu_helper.c in 2 files 2021-08-27 12:41:13 +10:00
mfrom_table.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
mfrom_table_gen.c target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c 2019-04-26 10:42:38 +10:00
misc_helper.c target/ppc: fold ppc_store_ptcr into it's only caller 2021-06-03 13:22:06 +10:00
mmu-book3s-v3.c target/ppc: Introduce ppc_xlate 2021-07-09 10:38:19 +10:00
mmu-book3s-v3.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc: change ppc_hash32_xlate to use mmu_idx 2021-07-09 10:38:19 +10:00
mmu-hash32.h target/ppc: change ppc_hash32_xlate to use mmu_idx 2021-07-09 10:38:19 +10:00
mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: fix address translation bug for radix mmus 2021-07-09 10:38:19 +10:00
mmu-radix64.h target/ppc: fix address translation bug for radix mmus 2021-07-09 10:38:19 +10:00
mmu_common.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
mmu_helper.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
spr_tcg.h target/ppc: adding user read/write functions for PMCs 2021-10-21 11:42:47 +11:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
trace-events target/ppc: Convert debug to trace events (exceptions) 2021-09-30 12:26:06 +10:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Remove the software TLB model of 7450 CPUs 2021-12-17 17:57:16 +01:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00