Clean up includes so that osdep.h is included first and headers
which it implies are not included manually.
This commit was created with scripts/clean-includes, with the changes
to the following files manually reverted:
contrib/libvhost-user/libvhost-user-glib.h
contrib/libvhost-user/libvhost-user.c
contrib/libvhost-user/libvhost-user.h
contrib/plugins/hotblocks.c
contrib/plugins/hotpages.c
contrib/plugins/howvec.c
contrib/plugins/lockstep.c
linux-user/mips64/cpu_loop.c
linux-user/mips64/signal.c
linux-user/sparc64/cpu_loop.c
linux-user/sparc64/signal.c
linux-user/x86_64/cpu_loop.c
linux-user/x86_64/signal.c
target/s390x/gen-features.c
tests/fp/platform.h
tests/migration/s390x/a-b-bios.c
tests/plugin/bb.c
tests/plugin/empty.c
tests/plugin/insn.c
tests/plugin/mem.c
tests/test-rcu-simpleq.c
tests/test-rcu-slist.c
tests/test-rcu-tailq.c
tests/uefi-test-tools/UefiTestToolsPkg/BiosTablesTest/BiosTablesTest.c
contrib/plugins/, tests/plugin/, and tests/test-rcu-slist.c appear not
to include osdep.h intentionally. The remaining reverts are the same
as in commit bbfff19688
.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20201113061216.2483385-1-armbru@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Alexander Bulekov <alxndr@bu.edu>
581 lines
16 KiB
C
581 lines
16 KiB
C
/*
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* Virtio vhost-user GPU Device
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*
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* Copyright Red Hat, Inc. 2013-2018
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*
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* Authors:
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* Dave Airlie <airlied@redhat.com>
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* Gerd Hoffmann <kraxel@redhat.com>
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* Marc-André Lureau <marcandre.lureau@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include <virglrenderer.h>
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#include "virgl.h"
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void
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vg_virgl_update_cursor_data(VuGpu *g, uint32_t resource_id,
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gpointer data)
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{
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uint32_t width, height;
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uint32_t *cursor;
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cursor = virgl_renderer_get_cursor_data(resource_id, &width, &height);
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g_return_if_fail(cursor != NULL);
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g_return_if_fail(width == 64);
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g_return_if_fail(height == 64);
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memcpy(data, cursor, 64 * 64 * sizeof(uint32_t));
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free(cursor);
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}
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static void
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virgl_cmd_context_create(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_ctx_create cc;
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VUGPU_FILL_CMD(cc);
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virgl_renderer_context_create(cc.hdr.ctx_id, cc.nlen,
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cc.debug_name);
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}
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static void
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virgl_cmd_context_destroy(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_ctx_destroy cd;
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VUGPU_FILL_CMD(cd);
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virgl_renderer_context_destroy(cd.hdr.ctx_id);
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}
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static void
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virgl_cmd_create_resource_2d(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resource_create_2d c2d;
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struct virgl_renderer_resource_create_args args;
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VUGPU_FILL_CMD(c2d);
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args.handle = c2d.resource_id;
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args.target = 2;
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args.format = c2d.format;
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args.bind = (1 << 1);
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args.width = c2d.width;
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args.height = c2d.height;
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args.depth = 1;
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args.array_size = 1;
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args.last_level = 0;
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args.nr_samples = 0;
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args.flags = VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP;
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virgl_renderer_resource_create(&args, NULL, 0);
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}
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static void
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virgl_cmd_create_resource_3d(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resource_create_3d c3d;
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struct virgl_renderer_resource_create_args args;
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VUGPU_FILL_CMD(c3d);
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args.handle = c3d.resource_id;
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args.target = c3d.target;
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args.format = c3d.format;
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args.bind = c3d.bind;
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args.width = c3d.width;
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args.height = c3d.height;
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args.depth = c3d.depth;
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args.array_size = c3d.array_size;
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args.last_level = c3d.last_level;
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args.nr_samples = c3d.nr_samples;
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args.flags = c3d.flags;
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virgl_renderer_resource_create(&args, NULL, 0);
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}
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static void
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virgl_cmd_resource_unref(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resource_unref unref;
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VUGPU_FILL_CMD(unref);
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virgl_renderer_resource_unref(unref.resource_id);
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}
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/* Not yet(?) defined in standard-headers, remove when possible */
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#ifndef VIRTIO_GPU_CAPSET_VIRGL2
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#define VIRTIO_GPU_CAPSET_VIRGL2 2
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#endif
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static void
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virgl_cmd_get_capset_info(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_get_capset_info info;
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struct virtio_gpu_resp_capset_info resp;
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VUGPU_FILL_CMD(info);
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if (info.capset_index == 0) {
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resp.capset_id = VIRTIO_GPU_CAPSET_VIRGL;
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virgl_renderer_get_cap_set(resp.capset_id,
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&resp.capset_max_version,
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&resp.capset_max_size);
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} else if (info.capset_index == 1) {
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resp.capset_id = VIRTIO_GPU_CAPSET_VIRGL2;
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virgl_renderer_get_cap_set(resp.capset_id,
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&resp.capset_max_version,
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&resp.capset_max_size);
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} else {
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resp.capset_max_version = 0;
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resp.capset_max_size = 0;
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}
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resp.hdr.type = VIRTIO_GPU_RESP_OK_CAPSET_INFO;
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vg_ctrl_response(g, cmd, &resp.hdr, sizeof(resp));
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}
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uint32_t
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vg_virgl_get_num_capsets(void)
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{
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uint32_t capset2_max_ver, capset2_max_size;
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virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_VIRGL2,
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&capset2_max_ver,
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&capset2_max_size);
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return capset2_max_ver ? 2 : 1;
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}
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static void
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virgl_cmd_get_capset(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_get_capset gc;
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struct virtio_gpu_resp_capset *resp;
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uint32_t max_ver, max_size;
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VUGPU_FILL_CMD(gc);
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virgl_renderer_get_cap_set(gc.capset_id, &max_ver,
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&max_size);
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resp = g_malloc0(sizeof(*resp) + max_size);
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resp->hdr.type = VIRTIO_GPU_RESP_OK_CAPSET;
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virgl_renderer_fill_caps(gc.capset_id,
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gc.capset_version,
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(void *)resp->capset_data);
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vg_ctrl_response(g, cmd, &resp->hdr, sizeof(*resp) + max_size);
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g_free(resp);
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}
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static void
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virgl_cmd_submit_3d(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_cmd_submit cs;
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void *buf;
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size_t s;
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VUGPU_FILL_CMD(cs);
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buf = g_malloc(cs.size);
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s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
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sizeof(cs), buf, cs.size);
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if (s != cs.size) {
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g_critical("%s: size mismatch (%zd/%d)", __func__, s, cs.size);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
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goto out;
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}
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virgl_renderer_submit_cmd(buf, cs.hdr.ctx_id, cs.size / 4);
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out:
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g_free(buf);
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}
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static void
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virgl_cmd_transfer_to_host_2d(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_transfer_to_host_2d t2d;
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struct virtio_gpu_box box;
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VUGPU_FILL_CMD(t2d);
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box.x = t2d.r.x;
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box.y = t2d.r.y;
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box.z = 0;
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box.w = t2d.r.width;
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box.h = t2d.r.height;
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box.d = 1;
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virgl_renderer_transfer_write_iov(t2d.resource_id,
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0,
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0,
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0,
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0,
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(struct virgl_box *)&box,
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t2d.offset, NULL, 0);
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}
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static void
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virgl_cmd_transfer_to_host_3d(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_transfer_host_3d t3d;
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VUGPU_FILL_CMD(t3d);
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virgl_renderer_transfer_write_iov(t3d.resource_id,
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t3d.hdr.ctx_id,
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t3d.level,
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t3d.stride,
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t3d.layer_stride,
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(struct virgl_box *)&t3d.box,
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t3d.offset, NULL, 0);
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}
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static void
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virgl_cmd_transfer_from_host_3d(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_transfer_host_3d tf3d;
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VUGPU_FILL_CMD(tf3d);
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virgl_renderer_transfer_read_iov(tf3d.resource_id,
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tf3d.hdr.ctx_id,
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tf3d.level,
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tf3d.stride,
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tf3d.layer_stride,
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(struct virgl_box *)&tf3d.box,
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tf3d.offset, NULL, 0);
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}
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static void
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virgl_resource_attach_backing(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resource_attach_backing att_rb;
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struct iovec *res_iovs;
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int ret;
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VUGPU_FILL_CMD(att_rb);
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ret = vg_create_mapping_iov(g, &att_rb, cmd, &res_iovs);
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if (ret != 0) {
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cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
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return;
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}
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virgl_renderer_resource_attach_iov(att_rb.resource_id,
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res_iovs, att_rb.nr_entries);
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}
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static void
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virgl_resource_detach_backing(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resource_detach_backing detach_rb;
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struct iovec *res_iovs = NULL;
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int num_iovs = 0;
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VUGPU_FILL_CMD(detach_rb);
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virgl_renderer_resource_detach_iov(detach_rb.resource_id,
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&res_iovs,
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&num_iovs);
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if (res_iovs == NULL || num_iovs == 0) {
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return;
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}
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g_free(res_iovs);
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}
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static void
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virgl_cmd_set_scanout(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_set_scanout ss;
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struct virgl_renderer_resource_info info;
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int ret;
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VUGPU_FILL_CMD(ss);
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if (ss.scanout_id >= VIRTIO_GPU_MAX_SCANOUTS) {
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g_critical("%s: illegal scanout id specified %d",
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__func__, ss.scanout_id);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
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return;
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}
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memset(&info, 0, sizeof(info));
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if (ss.resource_id && ss.r.width && ss.r.height) {
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ret = virgl_renderer_resource_get_info(ss.resource_id, &info);
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if (ret == -1) {
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g_critical("%s: illegal resource specified %d\n",
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__func__, ss.resource_id);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
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return;
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}
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int fd = -1;
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if (virgl_renderer_get_fd_for_texture(info.tex_id, &fd) < 0) {
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g_critical("%s: failed to get fd for texture\n", __func__);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
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return;
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}
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assert(fd >= 0);
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VhostUserGpuMsg msg = {
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.request = VHOST_USER_GPU_DMABUF_SCANOUT,
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.size = sizeof(VhostUserGpuDMABUFScanout),
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.payload.dmabuf_scanout.scanout_id = ss.scanout_id,
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.payload.dmabuf_scanout.x = ss.r.x,
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.payload.dmabuf_scanout.y = ss.r.y,
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.payload.dmabuf_scanout.width = ss.r.width,
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.payload.dmabuf_scanout.height = ss.r.height,
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.payload.dmabuf_scanout.fd_width = info.width,
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.payload.dmabuf_scanout.fd_height = info.height,
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.payload.dmabuf_scanout.fd_stride = info.stride,
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.payload.dmabuf_scanout.fd_flags = info.flags,
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.payload.dmabuf_scanout.fd_drm_fourcc = info.drm_fourcc
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};
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vg_send_msg(g, &msg, fd);
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close(fd);
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} else {
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VhostUserGpuMsg msg = {
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.request = VHOST_USER_GPU_DMABUF_SCANOUT,
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.size = sizeof(VhostUserGpuDMABUFScanout),
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.payload.dmabuf_scanout.scanout_id = ss.scanout_id,
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};
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g_debug("disable scanout");
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vg_send_msg(g, &msg, -1);
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}
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g->scanout[ss.scanout_id].resource_id = ss.resource_id;
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}
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static void
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virgl_cmd_resource_flush(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resource_flush rf;
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int i;
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VUGPU_FILL_CMD(rf);
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if (!rf.resource_id) {
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g_debug("bad resource id for flush..?");
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return;
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}
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for (i = 0; i < VIRTIO_GPU_MAX_SCANOUTS; i++) {
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if (g->scanout[i].resource_id != rf.resource_id) {
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continue;
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}
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VhostUserGpuMsg msg = {
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.request = VHOST_USER_GPU_DMABUF_UPDATE,
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.size = sizeof(VhostUserGpuUpdate),
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.payload.update.scanout_id = i,
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.payload.update.x = rf.r.x,
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.payload.update.y = rf.r.y,
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.payload.update.width = rf.r.width,
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.payload.update.height = rf.r.height
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};
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vg_send_msg(g, &msg, -1);
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vg_wait_ok(g);
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}
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}
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static void
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virgl_cmd_ctx_attach_resource(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_ctx_resource att_res;
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VUGPU_FILL_CMD(att_res);
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virgl_renderer_ctx_attach_resource(att_res.hdr.ctx_id, att_res.resource_id);
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}
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|
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static void
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virgl_cmd_ctx_detach_resource(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_ctx_resource det_res;
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VUGPU_FILL_CMD(det_res);
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virgl_renderer_ctx_detach_resource(det_res.hdr.ctx_id, det_res.resource_id);
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}
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void vg_virgl_process_cmd(VuGpu *g, struct virtio_gpu_ctrl_command *cmd)
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{
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virgl_renderer_force_ctx_0();
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switch (cmd->cmd_hdr.type) {
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case VIRTIO_GPU_CMD_CTX_CREATE:
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virgl_cmd_context_create(g, cmd);
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break;
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case VIRTIO_GPU_CMD_CTX_DESTROY:
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virgl_cmd_context_destroy(g, cmd);
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break;
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case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
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virgl_cmd_create_resource_2d(g, cmd);
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break;
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case VIRTIO_GPU_CMD_RESOURCE_CREATE_3D:
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virgl_cmd_create_resource_3d(g, cmd);
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break;
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case VIRTIO_GPU_CMD_SUBMIT_3D:
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virgl_cmd_submit_3d(g, cmd);
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break;
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case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
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virgl_cmd_transfer_to_host_2d(g, cmd);
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break;
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case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D:
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virgl_cmd_transfer_to_host_3d(g, cmd);
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break;
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case VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D:
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virgl_cmd_transfer_from_host_3d(g, cmd);
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break;
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case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
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virgl_resource_attach_backing(g, cmd);
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break;
|
|
case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
|
|
virgl_resource_detach_backing(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_SET_SCANOUT:
|
|
virgl_cmd_set_scanout(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
|
|
virgl_cmd_resource_flush(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_RESOURCE_UNREF:
|
|
virgl_cmd_resource_unref(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE:
|
|
/* TODO add security */
|
|
virgl_cmd_ctx_attach_resource(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE:
|
|
/* TODO add security */
|
|
virgl_cmd_ctx_detach_resource(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_GET_CAPSET_INFO:
|
|
virgl_cmd_get_capset_info(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_GET_CAPSET:
|
|
virgl_cmd_get_capset(g, cmd);
|
|
break;
|
|
case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
|
|
vg_get_display_info(g, cmd);
|
|
break;
|
|
default:
|
|
g_debug("TODO handle ctrl %x\n", cmd->cmd_hdr.type);
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
|
|
break;
|
|
}
|
|
|
|
if (cmd->finished) {
|
|
return;
|
|
}
|
|
|
|
if (cmd->error) {
|
|
g_warning("%s: ctrl 0x%x, error 0x%x\n", __func__,
|
|
cmd->cmd_hdr.type, cmd->error);
|
|
vg_ctrl_response_nodata(g, cmd, cmd->error);
|
|
return;
|
|
}
|
|
|
|
if (!(cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE)) {
|
|
vg_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
|
|
return;
|
|
}
|
|
|
|
g_debug("Creating fence id:%" PRId64 " type:%d",
|
|
cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
|
|
virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type);
|
|
}
|
|
|
|
static void
|
|
virgl_write_fence(void *opaque, uint32_t fence)
|
|
{
|
|
VuGpu *g = opaque;
|
|
struct virtio_gpu_ctrl_command *cmd, *tmp;
|
|
|
|
QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
|
|
/*
|
|
* the guest can end up emitting fences out of order
|
|
* so we should check all fenced cmds not just the first one.
|
|
*/
|
|
if (cmd->cmd_hdr.fence_id > fence) {
|
|
continue;
|
|
}
|
|
g_debug("FENCE %" PRIu64, cmd->cmd_hdr.fence_id);
|
|
vg_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
|
|
QTAILQ_REMOVE(&g->fenceq, cmd, next);
|
|
free(cmd);
|
|
g->inflight--;
|
|
}
|
|
}
|
|
|
|
#if defined(VIRGL_RENDERER_CALLBACKS_VERSION) && \
|
|
VIRGL_RENDERER_CALLBACKS_VERSION >= 2
|
|
static int
|
|
virgl_get_drm_fd(void *opaque)
|
|
{
|
|
VuGpu *g = opaque;
|
|
|
|
return g->drm_rnode_fd;
|
|
}
|
|
#endif
|
|
|
|
static struct virgl_renderer_callbacks virgl_cbs = {
|
|
#if defined(VIRGL_RENDERER_CALLBACKS_VERSION) && \
|
|
VIRGL_RENDERER_CALLBACKS_VERSION >= 2
|
|
.get_drm_fd = virgl_get_drm_fd,
|
|
.version = 2,
|
|
#else
|
|
.version = 1,
|
|
#endif
|
|
.write_fence = virgl_write_fence,
|
|
};
|
|
|
|
static void
|
|
vg_virgl_poll(VuDev *dev, int condition, void *data)
|
|
{
|
|
virgl_renderer_poll();
|
|
}
|
|
|
|
bool
|
|
vg_virgl_init(VuGpu *g)
|
|
{
|
|
int ret;
|
|
|
|
if (g->drm_rnode_fd && virgl_cbs.version == 1) {
|
|
g_warning("virgl will use the default rendernode");
|
|
}
|
|
|
|
ret = virgl_renderer_init(g,
|
|
VIRGL_RENDERER_USE_EGL |
|
|
VIRGL_RENDERER_THREAD_SYNC,
|
|
&virgl_cbs);
|
|
if (ret != 0) {
|
|
return false;
|
|
}
|
|
|
|
ret = virgl_renderer_get_poll_fd();
|
|
if (ret != -1) {
|
|
g->renderer_source =
|
|
vug_source_new(&g->dev, ret, G_IO_IN, vg_virgl_poll, g);
|
|
}
|
|
|
|
return true;
|
|
}
|