There are several boards with SPD EEPROMs that are now using duplicated or slightly different hard coded data. Add a helper to generate SPD data for a memory module of given type and size that could be used by these boards (either as is or with further changes if needed) which should help cleaning this up and avoid further duplication. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
294 lines
8.9 KiB
C
294 lines
8.9 KiB
C
/*
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* QEMU SMBus EEPROM device
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*
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* Copyright (c) 2007 Arastra, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "hw/hw.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus.h"
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//#define DEBUG
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typedef struct SMBusEEPROMDevice {
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SMBusDevice smbusdev;
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void *data;
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uint8_t offset;
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} SMBusEEPROMDevice;
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static void eeprom_quick_cmd(SMBusDevice *dev, uint8_t read)
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{
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#ifdef DEBUG
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printf("eeprom_quick_cmd: addr=0x%02x read=%d\n", dev->i2c.address, read);
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#endif
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}
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static void eeprom_send_byte(SMBusDevice *dev, uint8_t val)
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{
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SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev;
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#ifdef DEBUG
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printf("eeprom_send_byte: addr=0x%02x val=0x%02x\n",
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dev->i2c.address, val);
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#endif
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eeprom->offset = val;
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}
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static uint8_t eeprom_receive_byte(SMBusDevice *dev)
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{
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SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev;
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uint8_t *data = eeprom->data;
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uint8_t val = data[eeprom->offset++];
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#ifdef DEBUG
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printf("eeprom_receive_byte: addr=0x%02x val=0x%02x\n",
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dev->i2c.address, val);
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#endif
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return val;
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}
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static void eeprom_write_data(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len)
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{
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SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev;
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int n;
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#ifdef DEBUG
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printf("eeprom_write_byte: addr=0x%02x cmd=0x%02x val=0x%02x\n",
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dev->i2c.address, cmd, buf[0]);
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#endif
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/* A page write operation is not a valid SMBus command.
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It is a block write without a length byte. Fortunately we
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get the full block anyway. */
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/* TODO: Should this set the current location? */
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if (cmd + len > 256)
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n = 256 - cmd;
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else
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n = len;
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memcpy(eeprom->data + cmd, buf, n);
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len -= n;
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if (len)
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memcpy(eeprom->data, buf + n, len);
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}
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static uint8_t eeprom_read_data(SMBusDevice *dev, uint8_t cmd, int n)
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{
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SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev;
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/* If this is the first byte then set the current position. */
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if (n == 0)
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eeprom->offset = cmd;
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/* As with writes, we implement block reads without the
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SMBus length byte. */
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return eeprom_receive_byte(dev);
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}
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static void smbus_eeprom_realize(DeviceState *dev, Error **errp)
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{
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SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *)dev;
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eeprom->offset = 0;
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}
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static Property smbus_eeprom_properties[] = {
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DEFINE_PROP_PTR("data", SMBusEEPROMDevice, data),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void smbus_eeprom_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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SMBusDeviceClass *sc = SMBUS_DEVICE_CLASS(klass);
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dc->realize = smbus_eeprom_realize;
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sc->quick_cmd = eeprom_quick_cmd;
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sc->send_byte = eeprom_send_byte;
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sc->receive_byte = eeprom_receive_byte;
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sc->write_data = eeprom_write_data;
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sc->read_data = eeprom_read_data;
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dc->props = smbus_eeprom_properties;
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/* Reason: pointer property "data" */
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dc->user_creatable = false;
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}
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static const TypeInfo smbus_eeprom_info = {
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.name = "smbus-eeprom",
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.parent = TYPE_SMBUS_DEVICE,
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.instance_size = sizeof(SMBusEEPROMDevice),
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.class_init = smbus_eeprom_class_initfn,
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};
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static void smbus_eeprom_register_types(void)
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{
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type_register_static(&smbus_eeprom_info);
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}
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type_init(smbus_eeprom_register_types)
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void smbus_eeprom_init_one(I2CBus *smbus, uint8_t address, uint8_t *eeprom_buf)
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{
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DeviceState *dev;
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dev = qdev_create((BusState *) smbus, "smbus-eeprom");
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qdev_prop_set_uint8(dev, "address", address);
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qdev_prop_set_ptr(dev, "data", eeprom_buf);
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qdev_init_nofail(dev);
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}
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void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom,
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const uint8_t *eeprom_spd, int eeprom_spd_size)
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{
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int i;
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uint8_t *eeprom_buf = g_malloc0(8 * 256); /* XXX: make this persistent */
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if (eeprom_spd_size > 0) {
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memcpy(eeprom_buf, eeprom_spd, eeprom_spd_size);
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}
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for (i = 0; i < nb_eeprom; i++) {
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smbus_eeprom_init_one(smbus, 0x50 + i, eeprom_buf + (i * 256));
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}
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}
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/* Generate SDRAM SPD EEPROM data describing a module of type and size */
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uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t ram_size,
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Error **errp)
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{
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uint8_t *spd;
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uint8_t nbanks;
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uint16_t density;
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uint32_t size;
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int min_log2, max_log2, sz_log2;
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int i;
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switch (type) {
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case SDR:
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min_log2 = 2;
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max_log2 = 9;
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break;
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case DDR:
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min_log2 = 5;
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max_log2 = 12;
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break;
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case DDR2:
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min_log2 = 7;
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max_log2 = 14;
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break;
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default:
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g_assert_not_reached();
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}
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size = ram_size >> 20; /* work in terms of megabytes */
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if (size < 4) {
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error_setg(errp, "SDRAM size is too small");
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return NULL;
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}
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sz_log2 = 31 - clz32(size);
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size = 1U << sz_log2;
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if (ram_size > size * MiB) {
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error_setg(errp, "SDRAM size 0x"RAM_ADDR_FMT" is not a power of 2, "
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"truncating to %u MB", ram_size, size);
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}
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if (sz_log2 < min_log2) {
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error_setg(errp,
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"Memory size is too small for SDRAM type, adjusting type");
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if (size >= 32) {
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type = DDR;
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min_log2 = 5;
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max_log2 = 12;
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} else {
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type = SDR;
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min_log2 = 2;
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max_log2 = 9;
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}
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}
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nbanks = 1;
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while (sz_log2 > max_log2 && nbanks < 8) {
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sz_log2--;
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nbanks++;
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}
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if (size > (1ULL << sz_log2) * nbanks) {
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error_setg(errp, "Memory size is too big for SDRAM, truncating");
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}
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/* split to 2 banks if possible to avoid a bug in MIPS Malta firmware */
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if (nbanks == 1 && sz_log2 > min_log2) {
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sz_log2--;
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nbanks++;
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}
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density = 1ULL << (sz_log2 - 2);
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switch (type) {
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case DDR2:
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density = (density & 0xe0) | (density >> 8 & 0x1f);
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break;
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case DDR:
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density = (density & 0xf8) | (density >> 8 & 0x07);
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break;
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case SDR:
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default:
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density &= 0xff;
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break;
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}
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spd = g_malloc0(256);
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spd[0] = 128; /* data bytes in EEPROM */
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spd[1] = 8; /* log2 size of EEPROM */
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spd[2] = type;
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spd[3] = 13; /* row address bits */
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spd[4] = 10; /* column address bits */
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spd[5] = (type == DDR2 ? nbanks - 1 : nbanks);
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spd[6] = 64; /* module data width */
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/* reserved / data width high */
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spd[8] = 4; /* interface voltage level */
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spd[9] = 0x25; /* highest CAS latency */
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spd[10] = 1; /* access time */
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/* DIMM configuration 0 = non-ECC */
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spd[12] = 0x82; /* refresh requirements */
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spd[13] = 8; /* primary SDRAM width */
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/* ECC SDRAM width */
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spd[15] = (type == DDR2 ? 0 : 1); /* reserved / delay for random col rd */
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spd[16] = 12; /* burst lengths supported */
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spd[17] = 4; /* banks per SDRAM device */
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spd[18] = 12; /* ~CAS latencies supported */
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spd[19] = (type == DDR2 ? 0 : 1); /* reserved / ~CS latencies supported */
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spd[20] = 2; /* DIMM type / ~WE latencies */
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/* module features */
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/* memory chip features */
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spd[23] = 0x12; /* clock cycle time @ medium CAS latency */
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/* data access time */
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/* clock cycle time @ short CAS latency */
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/* data access time */
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spd[27] = 20; /* min. row precharge time */
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spd[28] = 15; /* min. row active row delay */
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spd[29] = 20; /* min. ~RAS to ~CAS delay */
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spd[30] = 45; /* min. active to precharge time */
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spd[31] = density;
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spd[32] = 20; /* addr/cmd setup time */
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spd[33] = 8; /* addr/cmd hold time */
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spd[34] = 20; /* data input setup time */
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spd[35] = 8; /* data input hold time */
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/* checksum */
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for (i = 0; i < 63; i++) {
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spd[63] += spd[i];
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}
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return spd;
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}
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