i386 cpuid.c currently claims XSAVE is supported in the CPUID filter, but that's not true: Only FXSAVE is supported. Remove that bit from the filter. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
1199 lines
41 KiB
C
1199 lines
41 KiB
C
/*
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* i386 CPUID helper functions
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "cpu.h"
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#include "kvm.h"
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#include "qemu-option.h"
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#include "qemu-config.h"
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/* feature flags taken from "Intel Processor Identification and the CPUID
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* Instruction" and AMD's "CPUID Specification". In cases of disagreement
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* between feature naming conventions, aliases may be added.
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*/
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static const char *feature_name[] = {
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"fpu", "vme", "de", "pse",
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"tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep",
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"mtrr", "pge", "mca", "cmov",
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"pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
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NULL, "ds" /* Intel dts */, "acpi", "mmx",
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"fxsr", "sse", "sse2", "ss",
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"ht" /* Intel htt */, "tm", "ia64", "pbe",
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};
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static const char *ext_feature_name[] = {
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"pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
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"ds_cpl", "vmx", "smx", "est",
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"tm2", "ssse3", "cid", NULL,
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"fma", "cx16", "xtpr", "pdcm",
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NULL, NULL, "dca", "sse4.1|sse4_1",
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"sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
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NULL, "aes", "xsave", "osxsave",
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"avx", NULL, NULL, "hypervisor",
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};
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static const char *ext2_feature_name[] = {
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"fpu", "vme", "de", "pse",
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"tsc", "msr", "pae", "mce",
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"cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
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"mtrr", "pge", "mca", "cmov",
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"pat", "pse36", NULL, NULL /* Linux mp */,
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"nx" /* Intel xd */, NULL, "mmxext", "mmx",
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"fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
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NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
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};
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static const char *ext3_feature_name[] = {
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"lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
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"cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
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"3dnowprefetch", "osvw", "ibs", "xop",
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"skinit", "wdt", NULL, NULL,
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"fma4", NULL, "cvt16", "nodeid_msr",
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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};
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static const char *kvm_feature_name[] = {
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"kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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/* collects per-function cpuid data
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*/
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typedef struct model_features_t {
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uint32_t *guest_feat;
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uint32_t *host_feat;
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uint32_t check_feat;
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const char **flag_names;
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uint32_t cpuid;
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} model_features_t;
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int check_cpuid = 0;
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int enforce_cpuid = 0;
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static void host_cpuid(uint32_t function, uint32_t count,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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{
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#if defined(CONFIG_KVM)
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uint32_t vec[4];
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#ifdef __x86_64__
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asm volatile("cpuid"
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: "=a"(vec[0]), "=b"(vec[1]),
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"=c"(vec[2]), "=d"(vec[3])
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: "0"(function), "c"(count) : "cc");
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#else
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asm volatile("pusha \n\t"
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"cpuid \n\t"
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"mov %%eax, 0(%2) \n\t"
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"mov %%ebx, 4(%2) \n\t"
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"mov %%ecx, 8(%2) \n\t"
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"mov %%edx, 12(%2) \n\t"
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"popa"
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: : "a"(function), "c"(count), "S"(vec)
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: "memory", "cc");
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#endif
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if (eax)
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*eax = vec[0];
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if (ebx)
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*ebx = vec[1];
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if (ecx)
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*ecx = vec[2];
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if (edx)
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*edx = vec[3];
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#endif
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}
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#define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
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/* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
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* a substring. ex if !NULL points to the first char after a substring,
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* otherwise the string is assumed to sized by a terminating nul.
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* Return lexical ordering of *s1:*s2.
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*/
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static int sstrcmp(const char *s1, const char *e1, const char *s2,
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const char *e2)
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{
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for (;;) {
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if (!*s1 || !*s2 || *s1 != *s2)
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return (*s1 - *s2);
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++s1, ++s2;
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if (s1 == e1 && s2 == e2)
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return (0);
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else if (s1 == e1)
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return (*s2);
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else if (s2 == e2)
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return (*s1);
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}
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}
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/* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
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* '|' delimited (possibly empty) strings in which case search for a match
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* within the alternatives proceeds left to right. Return 0 for success,
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* non-zero otherwise.
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*/
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static int altcmp(const char *s, const char *e, const char *altstr)
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{
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const char *p, *q;
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for (q = p = altstr; ; ) {
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while (*p && *p != '|')
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++p;
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if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
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return (0);
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if (!*p)
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return (1);
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else
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q = ++p;
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}
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}
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/* search featureset for flag *[s..e), if found set corresponding bit in
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* *pval and return success, otherwise return zero
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*/
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static int lookup_feature(uint32_t *pval, const char *s, const char *e,
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const char **featureset)
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{
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uint32_t mask;
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const char **ppc;
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for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc)
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if (*ppc && !altcmp(s, e, *ppc)) {
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*pval |= mask;
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break;
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}
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return (mask ? 1 : 0);
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}
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static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
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uint32_t *ext_features,
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uint32_t *ext2_features,
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uint32_t *ext3_features,
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uint32_t *kvm_features)
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{
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if (!lookup_feature(features, flagname, NULL, feature_name) &&
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!lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
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!lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
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!lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
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!lookup_feature(kvm_features, flagname, NULL, kvm_feature_name))
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fprintf(stderr, "CPU feature %s not found\n", flagname);
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}
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typedef struct x86_def_t {
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struct x86_def_t *next;
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const char *name;
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uint32_t level;
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uint32_t vendor1, vendor2, vendor3;
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int family;
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int model;
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int stepping;
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uint32_t features, ext_features, ext2_features, ext3_features, kvm_features;
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uint32_t xlevel;
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char model_id[48];
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int vendor_override;
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uint32_t flags;
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} x86_def_t;
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#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
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#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
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CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
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#define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
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CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
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CPUID_PSE36 | CPUID_FXSR)
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#define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
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#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
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CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
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CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
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CPUID_PAE | CPUID_SEP | CPUID_APIC)
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#define EXT2_FEATURE_MASK 0x0183F3FF
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#define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
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CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
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CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
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CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
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CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
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/* partly implemented:
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CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
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CPUID_PSE36 (needed for Solaris) */
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/* missing:
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CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
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#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
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CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
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CPUID_EXT_HYPERVISOR)
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/* missing:
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CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
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CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
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#define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
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CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
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CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
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/* missing:
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CPUID_EXT2_PDPE1GB */
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#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
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CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
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/* maintains list of cpu model definitions
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*/
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static x86_def_t *x86_defs = {NULL};
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/* built-in cpu model definitions (deprecated)
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*/
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static x86_def_t builtin_x86_defs[] = {
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{
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.name = "qemu64",
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.level = 4,
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.vendor1 = CPUID_VENDOR_AMD_1,
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.vendor2 = CPUID_VENDOR_AMD_2,
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.vendor3 = CPUID_VENDOR_AMD_3,
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.family = 6,
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.model = 2,
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.stepping = 3,
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.features = PPRO_FEATURES |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
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CPUID_PSE36,
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
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.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
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CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
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.ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
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CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
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.xlevel = 0x8000000A,
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.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
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},
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{
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.name = "phenom",
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.level = 5,
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.vendor1 = CPUID_VENDOR_AMD_1,
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.vendor2 = CPUID_VENDOR_AMD_2,
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.vendor3 = CPUID_VENDOR_AMD_3,
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.family = 16,
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.model = 2,
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.stepping = 3,
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.features = PPRO_FEATURES |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
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CPUID_PSE36 | CPUID_VME | CPUID_HT,
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
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CPUID_EXT_POPCNT,
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.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
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CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
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CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
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CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
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/* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
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CPUID_EXT3_CR8LEG,
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CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
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CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
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.ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
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CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
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.xlevel = 0x8000001A,
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.model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
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},
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{
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.name = "core2duo",
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.level = 10,
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.family = 6,
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.model = 15,
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.stepping = 11,
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.features = PPRO_FEATURES |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
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CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
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CPUID_HT | CPUID_TM | CPUID_PBE,
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
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CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
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CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
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.ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
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.ext3_features = CPUID_EXT3_LAHF_LM,
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.xlevel = 0x80000008,
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.model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
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},
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{
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.name = "kvm64",
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.level = 5,
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.vendor1 = CPUID_VENDOR_INTEL_1,
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.vendor2 = CPUID_VENDOR_INTEL_2,
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.vendor3 = CPUID_VENDOR_INTEL_3,
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.family = 15,
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.model = 6,
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.stepping = 1,
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/* Missing: CPUID_VME, CPUID_HT */
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.features = PPRO_FEATURES |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
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CPUID_PSE36,
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/* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
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/* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
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.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
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CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
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/* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
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CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
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CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
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CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
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.ext3_features = 0,
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.xlevel = 0x80000008,
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.model_id = "Common KVM processor"
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},
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{
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.name = "qemu32",
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.level = 4,
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.family = 6,
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.model = 3,
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.stepping = 3,
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.features = PPRO_FEATURES,
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
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.xlevel = 0x80000004,
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.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
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},
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{
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.name = "kvm32",
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.level = 5,
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.family = 15,
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.model = 6,
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.stepping = 1,
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.features = PPRO_FEATURES |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
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.ext_features = CPUID_EXT_SSE3,
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.ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
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.ext3_features = 0,
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.xlevel = 0x80000008,
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.model_id = "Common 32-bit KVM processor"
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},
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{
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.name = "coreduo",
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.level = 10,
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.family = 6,
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.model = 14,
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.stepping = 8,
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.features = PPRO_FEATURES | CPUID_VME |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
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CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
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CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
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.ext2_features = CPUID_EXT2_NX,
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.xlevel = 0x80000008,
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.model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
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},
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{
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.name = "486",
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.level = 1,
|
|
.family = 4,
|
|
.model = 0,
|
|
.stepping = 0,
|
|
.features = I486_FEATURES,
|
|
.xlevel = 0,
|
|
},
|
|
{
|
|
.name = "pentium",
|
|
.level = 1,
|
|
.family = 5,
|
|
.model = 4,
|
|
.stepping = 3,
|
|
.features = PENTIUM_FEATURES,
|
|
.xlevel = 0,
|
|
},
|
|
{
|
|
.name = "pentium2",
|
|
.level = 2,
|
|
.family = 6,
|
|
.model = 5,
|
|
.stepping = 2,
|
|
.features = PENTIUM2_FEATURES,
|
|
.xlevel = 0,
|
|
},
|
|
{
|
|
.name = "pentium3",
|
|
.level = 2,
|
|
.family = 6,
|
|
.model = 7,
|
|
.stepping = 3,
|
|
.features = PENTIUM3_FEATURES,
|
|
.xlevel = 0,
|
|
},
|
|
{
|
|
.name = "athlon",
|
|
.level = 2,
|
|
.vendor1 = CPUID_VENDOR_AMD_1,
|
|
.vendor2 = CPUID_VENDOR_AMD_2,
|
|
.vendor3 = CPUID_VENDOR_AMD_3,
|
|
.family = 6,
|
|
.model = 2,
|
|
.stepping = 3,
|
|
.features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
|
|
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
|
|
.xlevel = 0x80000008,
|
|
/* XXX: put another string ? */
|
|
.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
|
|
},
|
|
{
|
|
.name = "n270",
|
|
/* original is on level 10 */
|
|
.level = 5,
|
|
.family = 6,
|
|
.model = 28,
|
|
.stepping = 2,
|
|
.features = PPRO_FEATURES |
|
|
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
|
|
CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
|
|
/* Some CPUs got no CPUID_SEP */
|
|
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
|
|
CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
|
|
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
|
|
.ext3_features = CPUID_EXT3_LAHF_LM,
|
|
.xlevel = 0x8000000A,
|
|
.model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
|
|
},
|
|
};
|
|
|
|
static int cpu_x86_fill_model_id(char *str)
|
|
{
|
|
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
|
|
int i;
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
|
|
memcpy(str + i * 16 + 0, &eax, 4);
|
|
memcpy(str + i * 16 + 4, &ebx, 4);
|
|
memcpy(str + i * 16 + 8, &ecx, 4);
|
|
memcpy(str + i * 16 + 12, &edx, 4);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
|
|
{
|
|
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
|
|
|
|
x86_cpu_def->name = "host";
|
|
host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
|
|
x86_cpu_def->level = eax;
|
|
x86_cpu_def->vendor1 = ebx;
|
|
x86_cpu_def->vendor2 = edx;
|
|
x86_cpu_def->vendor3 = ecx;
|
|
|
|
host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
|
|
x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
|
|
x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
|
|
x86_cpu_def->stepping = eax & 0x0F;
|
|
x86_cpu_def->ext_features = ecx;
|
|
x86_cpu_def->features = edx;
|
|
|
|
host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
|
|
x86_cpu_def->xlevel = eax;
|
|
|
|
host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
|
|
x86_cpu_def->ext2_features = edx;
|
|
x86_cpu_def->ext3_features = ecx;
|
|
cpu_x86_fill_model_id(x86_cpu_def->model_id);
|
|
x86_cpu_def->vendor_override = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 32; ++i)
|
|
if (1 << i & mask) {
|
|
fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
|
|
" flag '%s' [0x%08x]\n",
|
|
f->cpuid >> 16, f->cpuid & 0xffff,
|
|
f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* best effort attempt to inform user requested cpu flags aren't making
|
|
* their way to the guest. Note: ft[].check_feat ideally should be
|
|
* specified via a guest_def field to suppress report of extraneous flags.
|
|
*/
|
|
static int check_features_against_host(x86_def_t *guest_def)
|
|
{
|
|
x86_def_t host_def;
|
|
uint32_t mask;
|
|
int rv, i;
|
|
struct model_features_t ft[] = {
|
|
{&guest_def->features, &host_def.features,
|
|
~0, feature_name, 0x00000000},
|
|
{&guest_def->ext_features, &host_def.ext_features,
|
|
~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
|
|
{&guest_def->ext2_features, &host_def.ext2_features,
|
|
~PPRO_FEATURES, ext2_feature_name, 0x80000000},
|
|
{&guest_def->ext3_features, &host_def.ext3_features,
|
|
~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
|
|
|
|
cpu_x86_fill_host(&host_def);
|
|
for (rv = 0, i = 0; i < sizeof (ft) / sizeof (ft[0]); ++i)
|
|
for (mask = 1; mask; mask <<= 1)
|
|
if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
|
|
!(*ft[i].host_feat & mask)) {
|
|
unavailable_host_feature(&ft[i], mask);
|
|
rv = 1;
|
|
}
|
|
return rv;
|
|
}
|
|
|
|
static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
|
|
{
|
|
unsigned int i;
|
|
x86_def_t *def;
|
|
|
|
char *s = strdup(cpu_model);
|
|
char *featurestr, *name = strtok(s, ",");
|
|
uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0, plus_kvm_features = 0;
|
|
uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0, minus_kvm_features = 0;
|
|
uint32_t numvalue;
|
|
|
|
for (def = x86_defs; def; def = def->next)
|
|
if (!strcmp(name, def->name))
|
|
break;
|
|
if (kvm_enabled() && strcmp(name, "host") == 0) {
|
|
cpu_x86_fill_host(x86_cpu_def);
|
|
} else if (!def) {
|
|
goto error;
|
|
} else {
|
|
memcpy(x86_cpu_def, def, sizeof(*def));
|
|
}
|
|
|
|
plus_kvm_features = ~0; /* not supported bits will be filtered out later */
|
|
|
|
add_flagname_to_bitmaps("hypervisor", &plus_features,
|
|
&plus_ext_features, &plus_ext2_features, &plus_ext3_features,
|
|
&plus_kvm_features);
|
|
|
|
featurestr = strtok(NULL, ",");
|
|
|
|
while (featurestr) {
|
|
char *val;
|
|
if (featurestr[0] == '+') {
|
|
add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features, &plus_kvm_features);
|
|
} else if (featurestr[0] == '-') {
|
|
add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features, &minus_kvm_features);
|
|
} else if ((val = strchr(featurestr, '='))) {
|
|
*val = 0; val++;
|
|
if (!strcmp(featurestr, "family")) {
|
|
char *err;
|
|
numvalue = strtoul(val, &err, 0);
|
|
if (!*val || *err) {
|
|
fprintf(stderr, "bad numerical value %s\n", val);
|
|
goto error;
|
|
}
|
|
x86_cpu_def->family = numvalue;
|
|
} else if (!strcmp(featurestr, "model")) {
|
|
char *err;
|
|
numvalue = strtoul(val, &err, 0);
|
|
if (!*val || *err || numvalue > 0xff) {
|
|
fprintf(stderr, "bad numerical value %s\n", val);
|
|
goto error;
|
|
}
|
|
x86_cpu_def->model = numvalue;
|
|
} else if (!strcmp(featurestr, "stepping")) {
|
|
char *err;
|
|
numvalue = strtoul(val, &err, 0);
|
|
if (!*val || *err || numvalue > 0xf) {
|
|
fprintf(stderr, "bad numerical value %s\n", val);
|
|
goto error;
|
|
}
|
|
x86_cpu_def->stepping = numvalue ;
|
|
} else if (!strcmp(featurestr, "level")) {
|
|
char *err;
|
|
numvalue = strtoul(val, &err, 0);
|
|
if (!*val || *err) {
|
|
fprintf(stderr, "bad numerical value %s\n", val);
|
|
goto error;
|
|
}
|
|
x86_cpu_def->level = numvalue;
|
|
} else if (!strcmp(featurestr, "xlevel")) {
|
|
char *err;
|
|
numvalue = strtoul(val, &err, 0);
|
|
if (!*val || *err) {
|
|
fprintf(stderr, "bad numerical value %s\n", val);
|
|
goto error;
|
|
}
|
|
if (numvalue < 0x80000000) {
|
|
numvalue += 0x80000000;
|
|
}
|
|
x86_cpu_def->xlevel = numvalue;
|
|
} else if (!strcmp(featurestr, "vendor")) {
|
|
if (strlen(val) != 12) {
|
|
fprintf(stderr, "vendor string must be 12 chars long\n");
|
|
goto error;
|
|
}
|
|
x86_cpu_def->vendor1 = 0;
|
|
x86_cpu_def->vendor2 = 0;
|
|
x86_cpu_def->vendor3 = 0;
|
|
for(i = 0; i < 4; i++) {
|
|
x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
|
|
x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
|
|
x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
|
|
}
|
|
x86_cpu_def->vendor_override = 1;
|
|
} else if (!strcmp(featurestr, "model_id")) {
|
|
pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
|
|
val);
|
|
} else {
|
|
fprintf(stderr, "unrecognized feature %s\n", featurestr);
|
|
goto error;
|
|
}
|
|
} else if (!strcmp(featurestr, "check")) {
|
|
check_cpuid = 1;
|
|
} else if (!strcmp(featurestr, "enforce")) {
|
|
check_cpuid = enforce_cpuid = 1;
|
|
} else {
|
|
fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
|
|
goto error;
|
|
}
|
|
featurestr = strtok(NULL, ",");
|
|
}
|
|
x86_cpu_def->features |= plus_features;
|
|
x86_cpu_def->ext_features |= plus_ext_features;
|
|
x86_cpu_def->ext2_features |= plus_ext2_features;
|
|
x86_cpu_def->ext3_features |= plus_ext3_features;
|
|
x86_cpu_def->kvm_features |= plus_kvm_features;
|
|
x86_cpu_def->features &= ~minus_features;
|
|
x86_cpu_def->ext_features &= ~minus_ext_features;
|
|
x86_cpu_def->ext2_features &= ~minus_ext2_features;
|
|
x86_cpu_def->ext3_features &= ~minus_ext3_features;
|
|
x86_cpu_def->kvm_features &= ~minus_kvm_features;
|
|
if (check_cpuid) {
|
|
if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
|
|
goto error;
|
|
}
|
|
free(s);
|
|
return 0;
|
|
|
|
error:
|
|
free(s);
|
|
return -1;
|
|
}
|
|
|
|
/* generate a composite string into buf of all cpuid names in featureset
|
|
* selected by fbits. indicate truncation at bufsize in the event of overflow.
|
|
* if flags, suppress names undefined in featureset.
|
|
*/
|
|
static void listflags(char *buf, int bufsize, uint32_t fbits,
|
|
const char **featureset, uint32_t flags)
|
|
{
|
|
const char **p = &featureset[31];
|
|
char *q, *b, bit;
|
|
int nc;
|
|
|
|
b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
|
|
*buf = '\0';
|
|
for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
|
|
if (fbits & 1 << bit && (*p || !flags)) {
|
|
if (*p)
|
|
nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
|
|
else
|
|
nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
|
|
if (bufsize <= nc) {
|
|
if (b) {
|
|
memcpy(b, "...", sizeof("..."));
|
|
}
|
|
return;
|
|
}
|
|
q += nc;
|
|
bufsize -= nc;
|
|
}
|
|
}
|
|
|
|
/* generate CPU information:
|
|
* -? list model names
|
|
* -?model list model names/IDs
|
|
* -?dump output all model (x86_def_t) data
|
|
* -?cpuid list all recognized cpuid flag names
|
|
*/
|
|
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
|
|
const char *optarg)
|
|
{
|
|
unsigned char model = !strcmp("?model", optarg);
|
|
unsigned char dump = !strcmp("?dump", optarg);
|
|
unsigned char cpuid = !strcmp("?cpuid", optarg);
|
|
x86_def_t *def;
|
|
char buf[256];
|
|
|
|
if (cpuid) {
|
|
(*cpu_fprintf)(f, "Recognized CPUID flags:\n");
|
|
listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
|
|
(*cpu_fprintf)(f, " f_edx: %s\n", buf);
|
|
listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
|
|
(*cpu_fprintf)(f, " f_ecx: %s\n", buf);
|
|
listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
|
|
(*cpu_fprintf)(f, " extf_edx: %s\n", buf);
|
|
listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
|
|
(*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
|
|
return;
|
|
}
|
|
for (def = x86_defs; def; def = def->next) {
|
|
snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
|
|
if (model || dump) {
|
|
(*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
|
|
} else {
|
|
(*cpu_fprintf)(f, "x86 %16s\n", buf);
|
|
}
|
|
if (dump) {
|
|
memcpy(buf, &def->vendor1, sizeof (def->vendor1));
|
|
memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
|
|
memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
|
|
buf[12] = '\0';
|
|
(*cpu_fprintf)(f,
|
|
" family %d model %d stepping %d level %d xlevel 0x%x"
|
|
" vendor \"%s\"\n",
|
|
def->family, def->model, def->stepping, def->level,
|
|
def->xlevel, buf);
|
|
listflags(buf, sizeof (buf), def->features, feature_name, 0);
|
|
(*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
|
|
buf);
|
|
listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
|
|
0);
|
|
(*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
|
|
buf);
|
|
listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
|
|
0);
|
|
(*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
|
|
def->ext2_features, buf);
|
|
listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
|
|
0);
|
|
(*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
|
|
def->ext3_features, buf);
|
|
(*cpu_fprintf)(f, "\n");
|
|
}
|
|
}
|
|
if (kvm_enabled()) {
|
|
(*cpu_fprintf)(f, "x86 %16s\n", "[host]");
|
|
}
|
|
}
|
|
|
|
int cpu_x86_register (CPUX86State *env, const char *cpu_model)
|
|
{
|
|
x86_def_t def1, *def = &def1;
|
|
|
|
if (cpu_x86_find_by_name(def, cpu_model) < 0)
|
|
return -1;
|
|
if (def->vendor1) {
|
|
env->cpuid_vendor1 = def->vendor1;
|
|
env->cpuid_vendor2 = def->vendor2;
|
|
env->cpuid_vendor3 = def->vendor3;
|
|
} else {
|
|
env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
|
|
env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
|
|
env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
|
|
}
|
|
env->cpuid_vendor_override = def->vendor_override;
|
|
env->cpuid_level = def->level;
|
|
if (def->family > 0x0f)
|
|
env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
|
|
else
|
|
env->cpuid_version = def->family << 8;
|
|
env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
|
|
env->cpuid_version |= def->stepping;
|
|
env->cpuid_features = def->features;
|
|
env->pat = 0x0007040600070406ULL;
|
|
env->cpuid_ext_features = def->ext_features;
|
|
env->cpuid_ext2_features = def->ext2_features;
|
|
env->cpuid_ext3_features = def->ext3_features;
|
|
env->cpuid_xlevel = def->xlevel;
|
|
env->cpuid_kvm_features = def->kvm_features;
|
|
if (!kvm_enabled()) {
|
|
env->cpuid_features &= TCG_FEATURES;
|
|
env->cpuid_ext_features &= TCG_EXT_FEATURES;
|
|
env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
|
|
#ifdef TARGET_X86_64
|
|
| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
|
|
#endif
|
|
);
|
|
env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
|
|
}
|
|
{
|
|
const char *model_id = def->model_id;
|
|
int c, len, i;
|
|
if (!model_id)
|
|
model_id = "";
|
|
len = strlen(model_id);
|
|
for(i = 0; i < 48; i++) {
|
|
if (i >= len)
|
|
c = '\0';
|
|
else
|
|
c = (uint8_t)model_id[i];
|
|
env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
/* copy vendor id string to 32 bit register, nul pad as needed
|
|
*/
|
|
static void cpyid(const char *s, uint32_t *id)
|
|
{
|
|
char *d = (char *)id;
|
|
char i;
|
|
|
|
for (i = sizeof (*id); i--; )
|
|
*d++ = *s ? *s++ : '\0';
|
|
}
|
|
|
|
/* interpret radix and convert from string to arbitrary scalar,
|
|
* otherwise flag failure
|
|
*/
|
|
#define setscalar(pval, str, perr) \
|
|
{ \
|
|
char *pend; \
|
|
unsigned long ul; \
|
|
\
|
|
ul = strtoul(str, &pend, 0); \
|
|
*str && !*pend ? (*pval = ul) : (*perr = 1); \
|
|
}
|
|
|
|
/* map cpuid options to feature bits, otherwise return failure
|
|
* (option tags in *str are delimited by whitespace)
|
|
*/
|
|
static void setfeatures(uint32_t *pval, const char *str,
|
|
const char **featureset, int *perr)
|
|
{
|
|
const char *p, *q;
|
|
|
|
for (q = p = str; *p || *q; q = p) {
|
|
while (iswhite(*p))
|
|
q = ++p;
|
|
while (*p && !iswhite(*p))
|
|
++p;
|
|
if (!*q && !*p)
|
|
return;
|
|
if (!lookup_feature(pval, q, p, featureset)) {
|
|
fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
|
|
(int)(p - q), q);
|
|
*perr = 1;
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* map config file options to x86_def_t form
|
|
*/
|
|
static int cpudef_setfield(const char *name, const char *str, void *opaque)
|
|
{
|
|
x86_def_t *def = opaque;
|
|
int err = 0;
|
|
|
|
if (!strcmp(name, "name")) {
|
|
def->name = strdup(str);
|
|
} else if (!strcmp(name, "model_id")) {
|
|
strncpy(def->model_id, str, sizeof (def->model_id));
|
|
} else if (!strcmp(name, "level")) {
|
|
setscalar(&def->level, str, &err)
|
|
} else if (!strcmp(name, "vendor")) {
|
|
cpyid(&str[0], &def->vendor1);
|
|
cpyid(&str[4], &def->vendor2);
|
|
cpyid(&str[8], &def->vendor3);
|
|
} else if (!strcmp(name, "family")) {
|
|
setscalar(&def->family, str, &err)
|
|
} else if (!strcmp(name, "model")) {
|
|
setscalar(&def->model, str, &err)
|
|
} else if (!strcmp(name, "stepping")) {
|
|
setscalar(&def->stepping, str, &err)
|
|
} else if (!strcmp(name, "feature_edx")) {
|
|
setfeatures(&def->features, str, feature_name, &err);
|
|
} else if (!strcmp(name, "feature_ecx")) {
|
|
setfeatures(&def->ext_features, str, ext_feature_name, &err);
|
|
} else if (!strcmp(name, "extfeature_edx")) {
|
|
setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
|
|
} else if (!strcmp(name, "extfeature_ecx")) {
|
|
setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
|
|
} else if (!strcmp(name, "xlevel")) {
|
|
setscalar(&def->xlevel, str, &err)
|
|
} else {
|
|
fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
|
|
return (1);
|
|
}
|
|
if (err) {
|
|
fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
|
|
return (1);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
/* register config file entry as x86_def_t
|
|
*/
|
|
static int cpudef_register(QemuOpts *opts, void *opaque)
|
|
{
|
|
x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
|
|
|
|
qemu_opt_foreach(opts, cpudef_setfield, def, 1);
|
|
def->next = x86_defs;
|
|
x86_defs = def;
|
|
return (0);
|
|
}
|
|
|
|
void cpu_clear_apic_feature(CPUX86State *env)
|
|
{
|
|
env->cpuid_features &= ~CPUID_APIC;
|
|
}
|
|
|
|
#endif /* !CONFIG_USER_ONLY */
|
|
|
|
/* register "cpudef" models defined in configuration file. Here we first
|
|
* preload any built-in definitions
|
|
*/
|
|
void x86_cpudef_setup(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
|
|
builtin_x86_defs[i].next = x86_defs;
|
|
builtin_x86_defs[i].flags = 1;
|
|
x86_defs = &builtin_x86_defs[i];
|
|
}
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
qemu_opts_foreach(&qemu_cpudef_opts, cpudef_register, NULL, 0);
|
|
#endif
|
|
}
|
|
|
|
static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
|
|
uint32_t *ecx, uint32_t *edx)
|
|
{
|
|
*ebx = env->cpuid_vendor1;
|
|
*edx = env->cpuid_vendor2;
|
|
*ecx = env->cpuid_vendor3;
|
|
|
|
/* sysenter isn't supported on compatibility mode on AMD, syscall
|
|
* isn't supported in compatibility mode on Intel.
|
|
* Normally we advertise the actual cpu vendor, but you can override
|
|
* this if you want to use KVM's sysenter/syscall emulation
|
|
* in compatibility mode and when doing cross vendor migration
|
|
*/
|
|
if (kvm_enabled() && ! env->cpuid_vendor_override) {
|
|
host_cpuid(0, 0, NULL, ebx, ecx, edx);
|
|
}
|
|
}
|
|
|
|
void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
|
uint32_t *eax, uint32_t *ebx,
|
|
uint32_t *ecx, uint32_t *edx)
|
|
{
|
|
/* test if maximum index reached */
|
|
if (index & 0x80000000) {
|
|
if (index > env->cpuid_xlevel)
|
|
index = env->cpuid_level;
|
|
} else {
|
|
if (index > env->cpuid_level)
|
|
index = env->cpuid_level;
|
|
}
|
|
|
|
switch(index) {
|
|
case 0:
|
|
*eax = env->cpuid_level;
|
|
get_cpuid_vendor(env, ebx, ecx, edx);
|
|
break;
|
|
case 1:
|
|
*eax = env->cpuid_version;
|
|
*ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
|
|
*ecx = env->cpuid_ext_features;
|
|
*edx = env->cpuid_features;
|
|
if (env->nr_cores * env->nr_threads > 1) {
|
|
*ebx |= (env->nr_cores * env->nr_threads) << 16;
|
|
*edx |= 1 << 28; /* HTT bit */
|
|
}
|
|
break;
|
|
case 2:
|
|
/* cache info: needed for Pentium Pro compatibility */
|
|
*eax = 1;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0x2c307d;
|
|
break;
|
|
case 4:
|
|
/* cache info: needed for Core compatibility */
|
|
if (env->nr_cores > 1) {
|
|
*eax = (env->nr_cores - 1) << 26;
|
|
} else {
|
|
*eax = 0;
|
|
}
|
|
switch (count) {
|
|
case 0: /* L1 dcache info */
|
|
*eax |= 0x0000121;
|
|
*ebx = 0x1c0003f;
|
|
*ecx = 0x000003f;
|
|
*edx = 0x0000001;
|
|
break;
|
|
case 1: /* L1 icache info */
|
|
*eax |= 0x0000122;
|
|
*ebx = 0x1c0003f;
|
|
*ecx = 0x000003f;
|
|
*edx = 0x0000001;
|
|
break;
|
|
case 2: /* L2 cache info */
|
|
*eax |= 0x0000143;
|
|
if (env->nr_threads > 1) {
|
|
*eax |= (env->nr_threads - 1) << 14;
|
|
}
|
|
*ebx = 0x3c0003f;
|
|
*ecx = 0x0000fff;
|
|
*edx = 0x0000001;
|
|
break;
|
|
default: /* end of info */
|
|
*eax = 0;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
break;
|
|
}
|
|
break;
|
|
case 5:
|
|
/* mwait info: needed for Core compatibility */
|
|
*eax = 0; /* Smallest monitor-line size in bytes */
|
|
*ebx = 0; /* Largest monitor-line size in bytes */
|
|
*ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
|
|
*edx = 0;
|
|
break;
|
|
case 6:
|
|
/* Thermal and Power Leaf */
|
|
*eax = 0;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
break;
|
|
case 9:
|
|
/* Direct Cache Access Information Leaf */
|
|
*eax = 0; /* Bits 0-31 in DCA_CAP MSR */
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
break;
|
|
case 0xA:
|
|
/* Architectural Performance Monitoring Leaf */
|
|
*eax = 0;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
break;
|
|
case 0xD:
|
|
/* Processor Extended State */
|
|
if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
|
|
*eax = 0;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
break;
|
|
}
|
|
if (kvm_enabled()) {
|
|
*eax = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EAX);
|
|
*ebx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EBX);
|
|
*ecx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_ECX);
|
|
*edx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EDX);
|
|
} else {
|
|
*eax = 0;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
}
|
|
break;
|
|
case 0x80000000:
|
|
*eax = env->cpuid_xlevel;
|
|
*ebx = env->cpuid_vendor1;
|
|
*edx = env->cpuid_vendor2;
|
|
*ecx = env->cpuid_vendor3;
|
|
break;
|
|
case 0x80000001:
|
|
*eax = env->cpuid_version;
|
|
*ebx = 0;
|
|
*ecx = env->cpuid_ext3_features;
|
|
*edx = env->cpuid_ext2_features;
|
|
|
|
/* The Linux kernel checks for the CMPLegacy bit and
|
|
* discards multiple thread information if it is set.
|
|
* So dont set it here for Intel to make Linux guests happy.
|
|
*/
|
|
if (env->nr_cores * env->nr_threads > 1) {
|
|
uint32_t tebx, tecx, tedx;
|
|
get_cpuid_vendor(env, &tebx, &tecx, &tedx);
|
|
if (tebx != CPUID_VENDOR_INTEL_1 ||
|
|
tedx != CPUID_VENDOR_INTEL_2 ||
|
|
tecx != CPUID_VENDOR_INTEL_3) {
|
|
*ecx |= 1 << 1; /* CmpLegacy bit */
|
|
}
|
|
}
|
|
|
|
if (kvm_enabled()) {
|
|
/* Nested SVM not yet supported in upstream QEMU */
|
|
*ecx &= ~CPUID_EXT3_SVM;
|
|
}
|
|
break;
|
|
case 0x80000002:
|
|
case 0x80000003:
|
|
case 0x80000004:
|
|
*eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
|
|
*ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
|
|
*ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
|
|
*edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
|
|
break;
|
|
case 0x80000005:
|
|
/* cache info (L1 cache) */
|
|
*eax = 0x01ff01ff;
|
|
*ebx = 0x01ff01ff;
|
|
*ecx = 0x40020140;
|
|
*edx = 0x40020140;
|
|
break;
|
|
case 0x80000006:
|
|
/* cache info (L2 cache) */
|
|
*eax = 0;
|
|
*ebx = 0x42004200;
|
|
*ecx = 0x02008140;
|
|
*edx = 0;
|
|
break;
|
|
case 0x80000008:
|
|
/* virtual & phys address size in low 2 bytes. */
|
|
/* XXX: This value must match the one used in the MMU code. */
|
|
if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
|
|
/* 64 bit processor */
|
|
/* XXX: The physical address space is limited to 42 bits in exec.c. */
|
|
*eax = 0x00003028; /* 48 bits virtual, 40 bits physical */
|
|
} else {
|
|
if (env->cpuid_features & CPUID_PSE36)
|
|
*eax = 0x00000024; /* 36 bits physical */
|
|
else
|
|
*eax = 0x00000020; /* 32 bits physical */
|
|
}
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
if (env->nr_cores * env->nr_threads > 1) {
|
|
*ecx |= (env->nr_cores * env->nr_threads) - 1;
|
|
}
|
|
break;
|
|
case 0x8000000A:
|
|
*eax = 0x00000001; /* SVM Revision */
|
|
*ebx = 0x00000010; /* nr of ASIDs */
|
|
*ecx = 0;
|
|
*edx = 0; /* optional features */
|
|
break;
|
|
default:
|
|
/* reserved values: zero */
|
|
*eax = 0;
|
|
*ebx = 0;
|
|
*ecx = 0;
|
|
*edx = 0;
|
|
break;
|
|
}
|
|
}
|