Add brief documentation of the new mps3-an547 board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-44-peter.maydell@linaro.org
48 lines
2.1 KiB
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48 lines
2.1 KiB
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Arm MPS2 and MPS3 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an500``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``, ``mps3-an524``, ``mps3-an547``)
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=========================================================================================================================================================
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These board models all use Arm M-profile CPUs.
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The Arm MPS2, MPS2+ and MPS3 dev boards are FPGA based (the 2+ has a
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bigger FPGA but is otherwise the same as the 2; the 3 has a bigger
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FPGA again, can handle 4GB of RAM and has a USB controller and QSPI flash).
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Since the CPU itself and most of the devices are in the FPGA, the
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details of the board as seen by the guest depend significantly on the
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FPGA image.
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QEMU models the following FPGA images:
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``mps2-an385``
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Cortex-M3 as documented in Arm Application Note AN385
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``mps2-an386``
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Cortex-M4 as documented in Arm Application Note AN386
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``mps2-an500``
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Cortex-M7 as documented in Arm Application Note AN500
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``mps2-an505``
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Cortex-M33 as documented in Arm Application Note AN505
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``mps2-an511``
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Cortex-M3 'DesignStart' as documented in Arm Application Note AN511
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``mps2-an521``
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Dual Cortex-M33 as documented in Arm Application Note AN521
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``mps3-an524``
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Dual Cortex-M33 on an MPS3, as documented in Arm Application Note AN524
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``mps3-an547``
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Cortex-M55 on an MPS3, as documented in Arm Application Note AN547
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Differences between QEMU and real hardware:
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- AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to
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block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as
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if zbt_boot_ctrl is always zero)
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- AN524 remapping of low memory to either BRAM or to QSPI flash is
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unimplemented (QEMU always maps this to BRAM, ignoring the
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SCC CFG_REG0 memory-remap bit)
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- QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest
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visible difference is that the LAN9118 doesn't support checksum
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offloading
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- QEMU does not model the QSPI flash in MPS3 boards as real QSPI
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flash, but only as simple ROM, so attempting to rewrite the flash
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from the guest will fail
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- QEMU does not model the USB controller in MPS3 boards
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