Alistair Francis 8903bf6e6d target/riscv: Add a base 32 and 64 bit CPU ... At the same time deprecate the ISA string CPUs. It is dobtful anyone specifies the CPUs, but we are keeping them for the Spike machine (which is about to be depreated) so we may as well just mark them as deprecated. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2019-05-24 12:09:23 -07:00
..
alpha	target/alpha: Fix user-only floating-point exceptions	2019-05-19 07:30:03 -07:00
arm	arm: Remove unnecessary includes of hw/arm/arm.h	2019-05-23 14:47:43 +01:00
cris	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
hppa	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
i386	Introduce qemu_guest_getrandom.	2019-05-23 12:57:17 +01:00
lm32	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
m68k	code cleanup, switch to transaction_failed hook	2019-05-17 10:28:23 +01:00
microblaze	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
mips	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
moxie	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
nios2	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
openrisc	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
ppc	target/ppc: Use qemu_guest_getrandom for DARN	2019-05-22 12:38:54 -04:00
riscv	target/riscv: Add a base 32 and 64 bit CPU	2019-05-24 12:09:23 -07:00
s390x	s390x update:	2019-05-21 16:30:13 +01:00
sh4	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
sparc	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
tilegx	target/tilegx: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
tricore	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
unicore32	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
xtensa	target/xtensa: SR reorganization and options for modern cores	2019-05-21 10:44:21 +01:00