Paolo Bonzini 8bca9a03ec move public invalidate APIs out of translate-all.{c,h}, clean up ... Place them in exec.c, exec-all.h and ram_addr.h. This removes knowledge of translate-all.h (which is an internal header) from several files outside accel/tcg and removes knowledge of AddressSpace from translate-all.c (as it only operates on ram_addr_t). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2018-06-28 19:05:30 +02:00
..
alpha	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
arm	target/arm: Handle small regions in get_phys_addr_pmsav8()	2018-06-26 17:50:42 +01:00
cris	tcg-next queue	2018-06-04 11:28:31 +01:00
hppa	tcg-next queue	2018-06-04 11:28:31 +01:00
i386	i386: Remove generic SMT thread check	2018-06-22 15:01:15 -03:00
lm32	tcg-next queue	2018-06-04 11:28:31 +01:00
m68k	target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn	2018-06-11 12:43:42 +02:00
microblaze	target-microblaze: Rework NOP/zero instruction handling	2018-06-15 09:05:00 +02:00
mips	target/mips: Fix gdbstub to read/write 64 bit FP registers	2018-06-27 20:13:50 +02:00
moxie	tcg-next queue	2018-06-04 11:28:31 +01:00
nios2	tcg-next queue	2018-06-04 11:28:31 +01:00
openrisc	tcg-next queue	2018-06-04 11:28:31 +01:00
ppc	spapr: Don't rewrite mmu capabilities in KVM mode	2018-06-22 14:19:07 +10:00
riscv	RISC-V: Add trailing '\n' to qemu_log() calls	2018-06-08 13:15:33 +01:00
s390x	s390x/cpumodels: add z14 Model ZR1	2018-06-18 10:50:32 +02:00
sh4	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
sparc	SPARC64: add icount support	2018-06-17 11:13:06 +01:00
tilegx	tcg-next queue	2018-06-04 11:28:31 +01:00
tricore	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
unicore32	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-01 15:15:27 -07:00
xtensa	move public invalidate APIs out of translate-all.{c,h}, clean up	2018-06-28 19:05:30 +02:00