All remaining conversions to qdev_realize() are for bus-less devices. Coccinelle script: // only correct for bus-less @dev! @@ expression errp; expression dev; @@ - qdev_init_nofail(dev); + qdev_realize(dev, NULL, &error_fatal); @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@ expression errp; expression dev; symbol true; @@ - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(DEVICE(dev), NULL, errp); @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@ expression errp; expression dev; symbol true; @@ - object_property_set_bool(dev, true, "realized", errp); + qdev_realize(DEVICE(dev), NULL, errp); Note that Coccinelle chokes on ARMSSE typedef vs. macro in hw/arm/armsse.c. Worked around by temporarily renaming the macro for the spatch run. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
390 lines
12 KiB
C
390 lines
12 KiB
C
/*
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* ARMV7M System emulation.
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the GPL.
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*/
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#include "qemu/osdep.h"
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#include "hw/arm/armv7m.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "hw/sysbus.h"
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#include "hw/arm/boot.h"
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#include "hw/loader.h"
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#include "hw/qdev-properties.h"
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#include "elf.h"
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#include "sysemu/qtest.h"
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#include "sysemu/reset.h"
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#include "qemu/error-report.h"
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#include "qemu/module.h"
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#include "exec/address-spaces.h"
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#include "target/arm/idau.h"
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/* Bitbanded IO. Each word corresponds to a single bit. */
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/* Get the byte address of the real memory for a bitband access. */
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static inline hwaddr bitband_addr(BitBandState *s, hwaddr offset)
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{
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return s->base | (offset & 0x1ffffff) >> 5;
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}
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static MemTxResult bitband_read(void *opaque, hwaddr offset,
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uint64_t *data, unsigned size, MemTxAttrs attrs)
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{
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BitBandState *s = opaque;
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uint8_t buf[4];
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MemTxResult res;
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int bitpos, bit;
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hwaddr addr;
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assert(size <= 4);
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/* Find address in underlying memory and round down to multiple of size */
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addr = bitband_addr(s, offset) & (-size);
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res = address_space_read(&s->source_as, addr, attrs, buf, size);
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if (res) {
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return res;
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}
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/* Bit position in the N bytes read... */
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bitpos = (offset >> 2) & ((size * 8) - 1);
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/* ...converted to byte in buffer and bit in byte */
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bit = (buf[bitpos >> 3] >> (bitpos & 7)) & 1;
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*data = bit;
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return MEMTX_OK;
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}
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static MemTxResult bitband_write(void *opaque, hwaddr offset, uint64_t value,
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unsigned size, MemTxAttrs attrs)
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{
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BitBandState *s = opaque;
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uint8_t buf[4];
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MemTxResult res;
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int bitpos, bit;
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hwaddr addr;
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assert(size <= 4);
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/* Find address in underlying memory and round down to multiple of size */
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addr = bitband_addr(s, offset) & (-size);
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res = address_space_read(&s->source_as, addr, attrs, buf, size);
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if (res) {
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return res;
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}
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/* Bit position in the N bytes read... */
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bitpos = (offset >> 2) & ((size * 8) - 1);
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/* ...converted to byte in buffer and bit in byte */
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bit = 1 << (bitpos & 7);
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if (value & 1) {
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buf[bitpos >> 3] |= bit;
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} else {
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buf[bitpos >> 3] &= ~bit;
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}
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return address_space_write(&s->source_as, addr, attrs, buf, size);
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}
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static const MemoryRegionOps bitband_ops = {
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.read_with_attrs = bitband_read,
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.write_with_attrs = bitband_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl.min_access_size = 1,
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.impl.max_access_size = 4,
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.valid.min_access_size = 1,
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.valid.max_access_size = 4,
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};
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static void bitband_init(Object *obj)
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{
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BitBandState *s = BITBAND(obj);
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SysBusDevice *dev = SYS_BUS_DEVICE(obj);
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memory_region_init_io(&s->iomem, obj, &bitband_ops, s,
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"bitband", 0x02000000);
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sysbus_init_mmio(dev, &s->iomem);
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}
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static void bitband_realize(DeviceState *dev, Error **errp)
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{
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BitBandState *s = BITBAND(dev);
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if (!s->source_memory) {
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error_setg(errp, "source-memory property not set");
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return;
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}
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address_space_init(&s->source_as, s->source_memory, "bitband-source");
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}
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/* Board init. */
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static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] = {
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0x20000000, 0x40000000
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};
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static const hwaddr bitband_output_addr[ARMV7M_NUM_BITBANDS] = {
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0x22000000, 0x42000000
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};
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static void armv7m_instance_init(Object *obj)
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{
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ARMv7MState *s = ARMV7M(obj);
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int i;
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/* Can't init the cpu here, we don't yet know which model to use */
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memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
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object_initialize_child(obj, "nvnic", &s->nvic, TYPE_NVIC);
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object_property_add_alias(obj, "num-irq",
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OBJECT(&s->nvic), "num-irq");
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for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
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object_initialize_child(obj, "bitband[*]", &s->bitband[i],
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TYPE_BITBAND);
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}
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}
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static void armv7m_realize(DeviceState *dev, Error **errp)
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{
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ARMv7MState *s = ARMV7M(dev);
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SysBusDevice *sbd;
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Error *err = NULL;
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int i;
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if (!s->board_memory) {
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error_setg(errp, "memory property was not set");
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return;
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}
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memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
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s->cpu = ARM_CPU(object_new_with_props(s->cpu_type, OBJECT(s), "cpu",
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&err, NULL));
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_link(OBJECT(s->cpu), OBJECT(&s->container), "memory",
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&error_abort);
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if (object_property_find(OBJECT(s->cpu), "idau", NULL)) {
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object_property_set_link(OBJECT(s->cpu), s->idau, "idau", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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}
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if (object_property_find(OBJECT(s->cpu), "init-svtor", NULL)) {
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object_property_set_uint(OBJECT(s->cpu), s->init_svtor,
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"init-svtor", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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}
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if (object_property_find(OBJECT(s->cpu), "start-powered-off", NULL)) {
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object_property_set_bool(OBJECT(s->cpu), s->start_powered_off,
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"start-powered-off", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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}
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if (object_property_find(OBJECT(s->cpu), "vfp", NULL)) {
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object_property_set_bool(OBJECT(s->cpu), s->vfp,
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"vfp", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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}
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if (object_property_find(OBJECT(s->cpu), "dsp", NULL)) {
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object_property_set_bool(OBJECT(s->cpu), s->dsp,
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"dsp", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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}
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/*
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* Tell the CPU where the NVIC is; it will fail realize if it doesn't
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* have one. Similarly, tell the NVIC where its CPU is.
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*/
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s->cpu->env.nvic = &s->nvic;
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s->nvic.cpu = s->cpu;
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qdev_realize(DEVICE(s->cpu), NULL, &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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/* Note that we must realize the NVIC after the CPU */
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sysbus_realize(SYS_BUS_DEVICE(&s->nvic), &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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/* Alias the NVIC's input and output GPIOs as our own so the board
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* code can wire them up. (We do this in realize because the
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* NVIC doesn't create the input GPIO array until realize.)
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*/
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qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL);
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qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ");
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qdev_pass_gpios(DEVICE(&s->nvic), dev, "NMI");
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/* Wire the NVIC up to the CPU */
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sbd = SYS_BUS_DEVICE(&s->nvic);
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sysbus_connect_irq(sbd, 0,
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qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
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memory_region_add_subregion(&s->container, 0xe000e000,
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sysbus_mmio_get_region(sbd, 0));
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for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
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if (s->enable_bitband) {
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Object *obj = OBJECT(&s->bitband[i]);
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SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
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object_property_set_int(obj, bitband_input_addr[i], "base", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_link(obj, OBJECT(s->board_memory),
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"source-memory", &error_abort);
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sysbus_realize(SYS_BUS_DEVICE(obj), &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->container, bitband_output_addr[i],
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sysbus_mmio_get_region(sbd, 0));
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} else {
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object_unparent(OBJECT(&s->bitband[i]));
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}
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}
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}
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static Property armv7m_properties[] = {
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DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
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DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
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MemoryRegion *),
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DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
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DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
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DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
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DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
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false),
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DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
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DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void armv7m_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = armv7m_realize;
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device_class_set_props(dc, armv7m_properties);
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}
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static const TypeInfo armv7m_info = {
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.name = TYPE_ARMV7M,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(ARMv7MState),
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.instance_init = armv7m_instance_init,
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.class_init = armv7m_class_init,
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};
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static void armv7m_reset(void *opaque)
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{
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ARMCPU *cpu = opaque;
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cpu_reset(CPU(cpu));
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}
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void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
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{
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int image_size;
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uint64_t entry;
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uint64_t lowaddr;
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int big_endian;
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AddressSpace *as;
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int asidx;
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CPUState *cs = CPU(cpu);
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#ifdef TARGET_WORDS_BIGENDIAN
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big_endian = 1;
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#else
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big_endian = 0;
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#endif
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if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
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asidx = ARMASIdx_S;
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} else {
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asidx = ARMASIdx_NS;
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}
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as = cpu_get_address_space(cs, asidx);
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if (kernel_filename) {
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image_size = load_elf_as(kernel_filename, NULL, NULL, NULL,
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&entry, &lowaddr, NULL,
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NULL, big_endian, EM_ARM, 1, 0, as);
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if (image_size < 0) {
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image_size = load_image_targphys_as(kernel_filename, 0,
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mem_size, as);
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lowaddr = 0;
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}
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if (image_size < 0) {
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error_report("Could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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}
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/* CPU objects (unlike devices) are not automatically reset on system
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* reset, so we must always register a handler to do so. Unlike
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* A-profile CPUs, we don't need to do anything special in the
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* handler to arrange that it starts correctly.
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* This is arguably the wrong place to do this, but it matches the
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* way A-profile does it. Note that this means that every M profile
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* board must call this function!
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*/
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qemu_register_reset(armv7m_reset, cpu);
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}
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static Property bitband_properties[] = {
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DEFINE_PROP_UINT32("base", BitBandState, base, 0),
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DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
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TYPE_MEMORY_REGION, MemoryRegion *),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void bitband_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = bitband_realize;
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device_class_set_props(dc, bitband_properties);
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}
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static const TypeInfo bitband_info = {
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.name = TYPE_BITBAND,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BitBandState),
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.instance_init = bitband_init,
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.class_init = bitband_class_init,
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};
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static void armv7m_register_types(void)
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{
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type_register_static(&bitband_info);
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type_register_static(&armv7m_info);
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}
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type_init(armv7m_register_types)
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