qemu-patch-raspberry4/target-arm
Peter Maydell 8c4f0eb94c target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
In helper.c the expression
  (env->uncached_cpsr & CPSR_M) != CPSR_USER
is always true; the right hand side was supposed to be ARM_CPU_MODE_USR
(an error in commit cb01d391).

Since the incorrect expression was always true, this just meant that
commit cb01d391 had no effect.

However simply changing the RHS here would reveal a logic error: if
the mode is USR we wish to completely ignore the attempt to set the
mode bits, which means that we must clear the CPSR_M bits from mask
to avoid the uncached_cpsr bits being updated at the end of the
function.

Move the condition into the correct place in the code, fix its RHS
constant, and add a comment about the fact that we must be doing a
gdbstub write if we're in user mode.

Fixes: https://bugs.launchpad.net/qemu/+bug/1550503
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1456764438-30015-1-git-send-email-peter.maydell@linaro.org
2016-03-04 11:30:16 +00:00
..
arch_dump.c arm: Clean up includes 2016-01-29 15:07:23 +00:00
arm-semi.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
cpu-qom.h target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2016-02-26 15:09:42 +00:00
cpu.c target-arm: Add the pmceid0 and pmceid1 registers 2016-02-18 14:16:17 +00:00
cpu.h target-arm: Fix handling of SDCR for 32-bit code 2016-02-26 15:09:42 +00:00
cpu64.c target-arm: Add the pmceid0 and pmceid1 registers 2016-02-18 14:16:17 +00:00
crypto_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
gdbstub.c target-arm: Add write_type argument to cpsr_write() 2016-02-26 15:09:41 +00:00
gdbstub64.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
helper-a64.c target-arm: Move aarch64_cpu_do_interrupt() to helper.c 2016-01-21 14:15:08 +00:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode 2016-03-04 11:30:16 +00:00
helper.h target-arm: Give CPSR setting on 32-bit exception return its own helper 2016-02-26 15:09:41 +00:00
internals.h target-arm: Move bank_number() into internals.h 2016-02-18 14:16:16 +00:00
iwmmxt_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm-consts.h all: Clean up includes 2016-02-23 12:43:05 +00:00
kvm-stub.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
kvm32.c target-arm: Add write_type argument to cpsr_write() 2016-02-26 15:09:41 +00:00
kvm64.c target-arm: Raw CPSR writes should skip checks and bank switching 2016-02-26 15:09:41 +00:00
kvm_arm.h target-arm: kvm - add support for HW assisted debug 2015-12-17 13:37:15 +00:00
machine.c target-arm: Raw CPSR writes should skip checks and bank switching 2016-02-26 15:09:41 +00:00
Makefile.objs target-arm: support QMP dump-guest-memory 2016-01-15 14:40:25 +00:00
neon_helper.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: Raw CPSR writes should skip checks and bank switching 2016-02-26 15:09:41 +00:00
psci.c target-arm: Clean up includes 2016-01-18 16:33:32 +00:00
translate-a64.c target-arm: Add isread parameter to CPAccessFns 2016-02-11 11:17:31 +00:00
translate.c tcg: Add type for vCPU pointers 2016-03-01 13:27:09 +00:00
translate.h tcg: Add type for vCPU pointers 2016-03-01 13:27:09 +00:00