In qdev, each bus in practice identified an abstract superclass, but this was mostly hidden. In QOM, instead, these abstract classes are explicit so we can move bus properties there. All bus property walks are removed, and all device property walks are changed to look along the class hierarchy instead. We would have duplicates if class A defines some properties and its subclass B does not define any, because class_b->props will be left equal to class_a->props. The solution here is to reintroduce the class_base_init TypeInfo callback, that was present in one of the early QOM versions but removed (on my request...) before committing. This breaks global bus properties, an obscure feature when used with the command-line which is actually useful and used when used by backwards-compatible machine types. So this patch also adjusts the global bus properties in hw/pc_piix.c to refer to the abstract class. Globals and other properties must be modified in the same patch to avoid complications related to initialization ordering. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
622 lines
18 KiB
C
622 lines
18 KiB
C
/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <glib.h>
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#include "hw.h"
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#include "pc.h"
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#include "apic.h"
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#include "pci.h"
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#include "pci_ids.h"
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#include "usb.h"
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#include "net.h"
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#include "boards.h"
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#include "ide.h"
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#include "kvm.h"
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#include "kvm/clock.h"
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#include "sysemu.h"
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#include "sysbus.h"
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#include "arch_init.h"
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#include "blockdev.h"
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#include "smbus.h"
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#include "xen.h"
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#include "memory.h"
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#include "exec-memory.h"
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#ifdef CONFIG_XEN
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# include <xen/hvm/hvm_info_table.h>
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#endif
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#define MAX_IDE_BUS 2
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static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
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static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
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static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
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static void kvm_piix3_setup_irq_routing(bool pci_enabled)
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{
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#ifdef CONFIG_KVM
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KVMState *s = kvm_state;
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int i;
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if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
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for (i = 0; i < 8; ++i) {
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if (i == 2) {
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continue;
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}
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kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_MASTER, i);
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}
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for (i = 8; i < 16; ++i) {
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kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
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}
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if (pci_enabled) {
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for (i = 0; i < 24; ++i) {
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if (i == 0) {
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kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, 2);
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} else if (i != 2) {
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kvm_irqchip_add_irq_route(s, i, KVM_IRQCHIP_IOAPIC, i);
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}
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}
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}
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}
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#endif /* CONFIG_KVM */
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}
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static void kvm_piix3_gsi_handler(void *opaque, int n, int level)
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{
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GSIState *s = opaque;
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if (n < ISA_NUM_IRQS) {
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/* Kernel will forward to both PIC and IOAPIC */
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qemu_set_irq(s->i8259_irq[n], level);
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} else {
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qemu_set_irq(s->ioapic_irq[n], level);
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}
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}
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static void ioapic_init(GSIState *gsi_state)
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{
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DeviceState *dev;
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SysBusDevice *d;
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unsigned int i;
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if (kvm_irqchip_in_kernel()) {
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dev = qdev_create(NULL, "kvm-ioapic");
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} else {
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dev = qdev_create(NULL, "ioapic");
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}
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/* FIXME: this should be under the piix3. */
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object_property_add_child(object_resolve_path("i440fx", NULL),
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"ioapic", OBJECT(dev), NULL);
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qdev_init_nofail(dev);
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d = sysbus_from_qdev(dev);
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sysbus_mmio_map(d, 0, 0xfec00000);
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for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
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}
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}
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/* PC hardware initialisation */
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static void pc_init1(MemoryRegion *system_memory,
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MemoryRegion *system_io,
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ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model,
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int pci_enabled,
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int kvmclock_enabled)
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{
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int i;
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ram_addr_t below_4g_mem_size, above_4g_mem_size;
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PCIBus *pci_bus;
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ISABus *isa_bus;
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PCII440FXState *i440fx_state;
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int piix3_devfn = -1;
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qemu_irq *cpu_irq;
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qemu_irq *gsi;
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qemu_irq *i8259;
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qemu_irq *smi_irq;
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GSIState *gsi_state;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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BusState *idebus[MAX_IDE_BUS];
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ISADevice *rtc_state;
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ISADevice *floppy;
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MemoryRegion *ram_memory;
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MemoryRegion *pci_memory;
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MemoryRegion *rom_memory;
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pc_cpus_init(cpu_model);
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if (kvmclock_enabled) {
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kvmclock_create();
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}
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if (ram_size >= 0xe0000000 ) {
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above_4g_mem_size = ram_size - 0xe0000000;
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below_4g_mem_size = 0xe0000000;
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} else {
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above_4g_mem_size = 0;
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below_4g_mem_size = ram_size;
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}
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if (pci_enabled) {
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pci_memory = g_new(MemoryRegion, 1);
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memory_region_init(pci_memory, "pci", INT64_MAX);
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rom_memory = pci_memory;
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} else {
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pci_memory = NULL;
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rom_memory = system_memory;
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}
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/* allocate ram and load rom/bios */
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if (!xen_enabled()) {
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pc_memory_init(system_memory,
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kernel_filename, kernel_cmdline, initrd_filename,
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below_4g_mem_size, above_4g_mem_size,
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pci_enabled ? rom_memory : system_memory, &ram_memory);
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}
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gsi_state = g_malloc0(sizeof(*gsi_state));
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if (kvm_irqchip_in_kernel()) {
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kvm_piix3_setup_irq_routing(pci_enabled);
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gsi = qemu_allocate_irqs(kvm_piix3_gsi_handler, gsi_state,
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GSI_NUM_PINS);
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} else {
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gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
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}
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if (pci_enabled) {
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pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
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system_memory, system_io, ram_size,
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below_4g_mem_size,
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0x100000000ULL - below_4g_mem_size,
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0x100000000ULL + above_4g_mem_size,
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(sizeof(target_phys_addr_t) == 4
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? 0
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: ((uint64_t)1 << 62)),
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pci_memory, ram_memory);
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} else {
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pci_bus = NULL;
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i440fx_state = NULL;
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isa_bus = isa_bus_new(NULL, system_io);
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no_hpet = 1;
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}
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isa_bus_irqs(isa_bus, gsi);
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if (kvm_irqchip_in_kernel()) {
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i8259 = kvm_i8259_init(isa_bus);
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} else if (xen_enabled()) {
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i8259 = xen_interrupt_controller_init();
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} else {
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cpu_irq = pc_allocate_cpu_irq();
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i8259 = i8259_init(isa_bus, cpu_irq[0]);
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}
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for (i = 0; i < ISA_NUM_IRQS; i++) {
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gsi_state->i8259_irq[i] = i8259[i];
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}
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if (pci_enabled) {
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ioapic_init(gsi_state);
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}
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pc_register_ferr_irq(gsi[13]);
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pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
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if (xen_enabled()) {
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pci_create_simple(pci_bus, -1, "xen-platform");
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}
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/* init basic PC hardware */
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pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled());
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for(i = 0; i < nb_nics; i++) {
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NICInfo *nd = &nd_table[i];
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if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
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pc_init_ne2k_isa(isa_bus, nd);
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else
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pci_nic_init_nofail(nd, "e1000", NULL);
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}
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ide_drive_get(hd, MAX_IDE_BUS);
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if (pci_enabled) {
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PCIDevice *dev;
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if (xen_enabled()) {
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dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
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} else {
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dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
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}
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idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
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idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
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} else {
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for(i = 0; i < MAX_IDE_BUS; i++) {
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ISADevice *dev;
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dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
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ide_irq[i],
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hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
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idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
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}
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}
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audio_init(isa_bus, pci_enabled ? pci_bus : NULL);
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pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
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floppy, idebus[0], idebus[1], rtc_state);
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if (pci_enabled && usb_enabled) {
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pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
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}
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if (pci_enabled && acpi_enabled) {
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i2c_bus *smbus;
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smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
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/* TODO: Populate SPD eeprom data. */
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smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
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gsi[9], *smi_irq,
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kvm_enabled());
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smbus_eeprom_init(smbus, 8, NULL, 0);
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}
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if (pci_enabled) {
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pc_pci_device_init(pci_bus);
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}
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}
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static void pc_init_pci(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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pc_init1(get_system_memory(),
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get_system_io(),
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ram_size, boot_device,
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kernel_filename, kernel_cmdline,
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initrd_filename, cpu_model, 1, 1);
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}
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static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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pc_init1(get_system_memory(),
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get_system_io(),
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ram_size, boot_device,
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kernel_filename, kernel_cmdline,
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initrd_filename, cpu_model, 1, 0);
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}
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static void pc_init_isa(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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if (cpu_model == NULL)
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cpu_model = "486";
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pc_init1(get_system_memory(),
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get_system_io(),
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ram_size, boot_device,
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kernel_filename, kernel_cmdline,
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initrd_filename, cpu_model, 0, 1);
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}
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#ifdef CONFIG_XEN
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static void pc_xen_hvm_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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if (xen_hvm_init() != 0) {
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hw_error("xen hardware virtual machine initialisation failed");
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}
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pc_init_pci_no_kvmclock(ram_size, boot_device,
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kernel_filename, kernel_cmdline,
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initrd_filename, cpu_model);
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xen_vcpu_init();
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}
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#endif
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static QEMUMachine pc_machine_v1_1 = {
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.name = "pc-1.1",
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.alias = "pc",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.is_default = 1,
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};
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#define PC_COMPAT_1_0 \
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{\
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.driver = "pc-sysfw",\
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.property = "rom_only",\
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.value = stringify(1),\
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}, {\
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.driver = "isa-fdc",\
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.property = "check_media_rate",\
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.value = "off",\
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}, {\
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.driver = "virtio-balloon-pci",\
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.property = "class",\
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.value = stringify(PCI_CLASS_MEMORY_RAM),\
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},{\
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.driver = "apic",\
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.property = "vapic",\
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.value = "off",\
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},{\
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.driver = TYPE_USB_DEVICE,\
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.property = "full-path",\
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.value = "no",\
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}
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static QEMUMachine pc_machine_v1_0 = {
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.name = "pc-1.0",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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PC_COMPAT_1_0,
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{ /* end of list */ }
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},
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};
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#define PC_COMPAT_0_15 \
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PC_COMPAT_1_0
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static QEMUMachine pc_machine_v0_15 = {
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.name = "pc-0.15",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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PC_COMPAT_0_15,
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{ /* end of list */ }
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},
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};
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#define PC_COMPAT_0_14 \
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PC_COMPAT_0_15,\
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{\
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.driver = "virtio-blk-pci",\
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.property = "event_idx",\
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.value = "off",\
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},{\
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.driver = "virtio-serial-pci",\
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.property = "event_idx",\
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.value = "off",\
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},{\
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.driver = "virtio-net-pci",\
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.property = "event_idx",\
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.value = "off",\
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},{\
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.driver = "virtio-balloon-pci",\
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.property = "event_idx",\
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.value = "off",\
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}
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static QEMUMachine pc_machine_v0_14 = {
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.name = "pc-0.14",
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.desc = "Standard PC",
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.init = pc_init_pci,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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PC_COMPAT_0_14,
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{
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.driver = "qxl",
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.property = "revision",
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.value = stringify(2),
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},{
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.driver = "qxl-vga",
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.property = "revision",
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.value = stringify(2),
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},
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{ /* end of list */ }
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},
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};
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#define PC_COMPAT_0_13 \
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PC_COMPAT_0_14,\
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{\
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.driver = TYPE_PCI_DEVICE,\
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.property = "command_serr_enable",\
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.value = "off",\
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},{\
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.driver = "AC97",\
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.property = "use_broken_id",\
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.value = stringify(1),\
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}
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static QEMUMachine pc_machine_v0_13 = {
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.name = "pc-0.13",
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.desc = "Standard PC",
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.init = pc_init_pci_no_kvmclock,
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.max_cpus = 255,
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.compat_props = (GlobalProperty[]) {
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PC_COMPAT_0_13,
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{
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.driver = "virtio-9p-pci",
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.property = "vectors",
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.value = stringify(0),
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},{
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.driver = "VGA",
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.property = "rombar",
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.value = stringify(0),
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},{
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.driver = "vmware-svga",
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.property = "rombar",
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.value = stringify(0),
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},
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{ /* end of list */ }
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},
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};
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|
|
#define PC_COMPAT_0_12 \
|
|
PC_COMPAT_0_13,\
|
|
{\
|
|
.driver = "virtio-serial-pci",\
|
|
.property = "max_ports",\
|
|
.value = stringify(1),\
|
|
},{\
|
|
.driver = "virtio-serial-pci",\
|
|
.property = "vectors",\
|
|
.value = stringify(0),\
|
|
}
|
|
|
|
static QEMUMachine pc_machine_v0_12 = {
|
|
.name = "pc-0.12",
|
|
.desc = "Standard PC",
|
|
.init = pc_init_pci_no_kvmclock,
|
|
.max_cpus = 255,
|
|
.compat_props = (GlobalProperty[]) {
|
|
PC_COMPAT_0_12,
|
|
{
|
|
.driver = "VGA",
|
|
.property = "rombar",
|
|
.value = stringify(0),
|
|
},{
|
|
.driver = "vmware-svga",
|
|
.property = "rombar",
|
|
.value = stringify(0),
|
|
},
|
|
{ /* end of list */ }
|
|
}
|
|
};
|
|
|
|
#define PC_COMPAT_0_11 \
|
|
PC_COMPAT_0_12,\
|
|
{\
|
|
.driver = "virtio-blk-pci",\
|
|
.property = "vectors",\
|
|
.value = stringify(0),\
|
|
},{\
|
|
.driver = TYPE_PCI_DEVICE,\
|
|
.property = "rombar",\
|
|
.value = stringify(0),\
|
|
}
|
|
|
|
static QEMUMachine pc_machine_v0_11 = {
|
|
.name = "pc-0.11",
|
|
.desc = "Standard PC, qemu 0.11",
|
|
.init = pc_init_pci_no_kvmclock,
|
|
.max_cpus = 255,
|
|
.compat_props = (GlobalProperty[]) {
|
|
PC_COMPAT_0_11,
|
|
{
|
|
.driver = "ide-drive",
|
|
.property = "ver",
|
|
.value = "0.11",
|
|
},{
|
|
.driver = "scsi-disk",
|
|
.property = "ver",
|
|
.value = "0.11",
|
|
},
|
|
{ /* end of list */ }
|
|
}
|
|
};
|
|
|
|
static QEMUMachine pc_machine_v0_10 = {
|
|
.name = "pc-0.10",
|
|
.desc = "Standard PC, qemu 0.10",
|
|
.init = pc_init_pci_no_kvmclock,
|
|
.max_cpus = 255,
|
|
.compat_props = (GlobalProperty[]) {
|
|
PC_COMPAT_0_11,
|
|
{
|
|
.driver = "virtio-blk-pci",
|
|
.property = "class",
|
|
.value = stringify(PCI_CLASS_STORAGE_OTHER),
|
|
},{
|
|
.driver = "virtio-serial-pci",
|
|
.property = "class",
|
|
.value = stringify(PCI_CLASS_DISPLAY_OTHER),
|
|
},{
|
|
.driver = "virtio-net-pci",
|
|
.property = "vectors",
|
|
.value = stringify(0),
|
|
},{
|
|
.driver = "ide-drive",
|
|
.property = "ver",
|
|
.value = "0.10",
|
|
},{
|
|
.driver = "scsi-disk",
|
|
.property = "ver",
|
|
.value = "0.10",
|
|
},
|
|
{ /* end of list */ }
|
|
},
|
|
};
|
|
|
|
static QEMUMachine isapc_machine = {
|
|
.name = "isapc",
|
|
.desc = "ISA-only PC",
|
|
.init = pc_init_isa,
|
|
.max_cpus = 1,
|
|
.compat_props = (GlobalProperty[]) {
|
|
{
|
|
.driver = "pc-sysfw",
|
|
.property = "rom_only",
|
|
.value = stringify(1),
|
|
},
|
|
{ /* end of list */ }
|
|
},
|
|
};
|
|
|
|
#ifdef CONFIG_XEN
|
|
static QEMUMachine xenfv_machine = {
|
|
.name = "xenfv",
|
|
.desc = "Xen Fully-virtualized PC",
|
|
.init = pc_xen_hvm_init,
|
|
.max_cpus = HVM_MAX_VCPUS,
|
|
.default_machine_opts = "accel=xen",
|
|
};
|
|
#endif
|
|
|
|
static void pc_machine_init(void)
|
|
{
|
|
qemu_register_machine(&pc_machine_v1_1);
|
|
qemu_register_machine(&pc_machine_v1_0);
|
|
qemu_register_machine(&pc_machine_v0_15);
|
|
qemu_register_machine(&pc_machine_v0_14);
|
|
qemu_register_machine(&pc_machine_v0_13);
|
|
qemu_register_machine(&pc_machine_v0_12);
|
|
qemu_register_machine(&pc_machine_v0_11);
|
|
qemu_register_machine(&pc_machine_v0_10);
|
|
qemu_register_machine(&isapc_machine);
|
|
#ifdef CONFIG_XEN
|
|
qemu_register_machine(&xenfv_machine);
|
|
#endif
|
|
}
|
|
|
|
machine_init(pc_machine_init);
|