qemu-patch-raspberry4/target-xtensa
Richard Henderson 4e5e121515 tcg: Remove gen_intermediate_code_pc
It is no longer used, so tidy up everything reached by it.
This includes the gen_opc_* arrays, the search_pc parameter
and the inline gen_intermediate_code_internal functions.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-10-07 20:36:52 +11:00
..
core-dc232b target-xtensa: add dc232b core 2011-10-16 10:40:02 +00:00
core-dc233c target-xtensa: add dc233c core 2012-04-15 17:43:16 +00:00
core-fsf target-xtensa: add fsf core 2011-10-16 10:40:16 +00:00
Makefile.objs monitor: remove target-specific code from monitor.c 2015-09-16 17:33:32 +02:00
core-dc232b.c target-xtensa: fix gdb register map construction 2015-07-06 13:25:12 +03:00
core-dc233c.c target-xtensa: fix gdb register map construction 2015-07-06 13:25:12 +03:00
core-fsf.c target-xtensa: fix gdb register map construction 2015-07-06 13:25:12 +03:00
cpu-qom.h target-xtensa: implement do_unassigned_access callback 2015-03-07 15:27:54 +03:00
cpu.c cpu: Change cpu_exec_init() arg to cpu, not env 2015-07-09 15:20:40 +02:00
cpu.h target-*: Drop cpu_gen_code define 2015-10-07 20:36:50 +11:00
gdbstub.c target-xtensa: add 64-bit floating point registers 2015-07-06 13:25:11 +03:00
helper.c target-xtensa: fix gdb register map construction 2015-07-06 13:25:12 +03:00
helper.h target-xtensa: record available window in TB flags 2014-12-17 05:49:32 +03:00
import_core.sh target-xtensa: fix gdb register map construction 2015-07-06 13:25:12 +03:00
monitor.c monitor: remove target-specific code from monitor.c 2015-09-16 17:33:32 +02:00
op_helper.c target-xtensa: implement do_unassigned_access callback 2015-03-07 15:27:54 +03:00
overlay_tool.h target-xtensa: fix gdb register map construction 2015-07-06 13:25:12 +03:00
translate.c tcg: Remove gen_intermediate_code_pc 2015-10-07 20:36:52 +11:00
xtensa-semi.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00