The PBA bridge unit (Power Bus Access) connects the OCC (On Chip Controller) to the Power bus and System Memory. The PBA is used to gather sensor data, for power management, for sleep states, for initial boot, among other things. The PBA logic provides a set of four registers PowerBus Access Base Address Registers (PBABAR0..3) which map the OCC address space to the PowerBus space. These registers are setup by the initial FW and define the PowerBus Range of system memory that can be accessed by PBA. The current modeling of the PBABAR registers is done under the common XSCOM handlers. We introduce a specific XSCOM regions for these registers and fix : - BAR sizes and BAR masks - The mapping of the OCC common area. It is common to all chips and should be mapped once. We will address per-OCC area in the next change. - OCC common area is in BAR 3 on P8 Inspired by previous work of Balamuruhan S <bala24@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191211082912.2625-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
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* QEMU PowerPC PowerNV Emulation of a few HOMER related registers
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*
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* Copyright (c) 2019, IBM Corporation.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef PPC_PNV_HOMER_H
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#define PPC_PNV_HOMER_H
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#include "hw/ppc/pnv.h"
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#define TYPE_PNV_HOMER "pnv-homer"
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#define PNV_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV_HOMER)
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#define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8"
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#define PNV8_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV8_HOMER)
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#define TYPE_PNV9_HOMER TYPE_PNV_HOMER "-POWER9"
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#define PNV9_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV9_HOMER)
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typedef struct PnvHomer {
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DeviceState parent;
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struct PnvChip *chip;
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MemoryRegion pba_regs;
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MemoryRegion regs;
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} PnvHomer;
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#define PNV_HOMER_CLASS(klass) \
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OBJECT_CLASS_CHECK(PnvHomerClass, (klass), TYPE_PNV_HOMER)
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#define PNV_HOMER_GET_CLASS(obj) \
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OBJECT_GET_CLASS(PnvHomerClass, (obj), TYPE_PNV_HOMER)
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typedef struct PnvHomerClass {
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DeviceClass parent_class;
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int pba_size;
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const MemoryRegionOps *pba_ops;
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int homer_size;
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const MemoryRegionOps *homer_ops;
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hwaddr core_max_base;
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} PnvHomerClass;
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#endif /* PPC_PNV_HOMER_H */
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