7316329aa5
Unlike other tcg target code generators, this one does not generate machine code for some cpu. It generates machine independent bytecode which is interpreted later. This allows running QEMU on any host. Interpreted bytecode is slower than direct execution of generated machine code. Signed-off-by: Stefan Weil <sw@weilnetz.de>
71 lines
2 KiB
C
71 lines
2 KiB
C
/*
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* dyngen defines for micro operation code
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#if !defined(__DYNGEN_EXEC_H__)
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#define __DYNGEN_EXEC_H__
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#if defined(CONFIG_TCG_INTERPRETER)
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/* The TCG interpreter does not need a special register AREG0,
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* but it is possible to use one by defining AREG0.
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* On i386, register edi seems to work. */
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/* Run without special register AREG0 or use a value defined elsewhere. */
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#elif defined(__i386__)
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#define AREG0 "ebp"
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#elif defined(__x86_64__)
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#define AREG0 "r14"
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#elif defined(_ARCH_PPC)
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#define AREG0 "r27"
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#elif defined(__arm__)
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#define AREG0 "r7"
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#elif defined(__hppa__)
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#define AREG0 "r17"
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#elif defined(__mips__)
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#define AREG0 "s0"
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#elif defined(__sparc__)
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#ifdef CONFIG_SOLARIS
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#define AREG0 "g2"
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#else
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#ifdef __sparc_v9__
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#define AREG0 "g5"
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#else
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#define AREG0 "g6"
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#endif
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#endif
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#elif defined(__s390__)
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#define AREG0 "r10"
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#elif defined(__alpha__)
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/* Note $15 is the frame pointer, so anything in op-i386.c that would
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require a frame pointer, like alloca, would probably loose. */
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#define AREG0 "$15"
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#elif defined(__mc68000)
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#define AREG0 "%a5"
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#elif defined(__ia64__)
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#define AREG0 "r7"
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#else
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#error unsupported CPU
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#endif
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#if defined(AREG0)
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register CPUState *env asm(AREG0);
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#else
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/* TODO: Try env = cpu_single_env. */
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extern CPUState *env;
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#endif
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#endif /* !defined(__DYNGEN_EXEC_H__) */
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