Websites are downing, but GitHub may last forever. Loongson even doesn't recogonize 2E as their products nowadays.. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201224031750.52146-3-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
397 lines
12 KiB
C
397 lines
12 KiB
C
/*
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* QEMU fuloong 2e mini pc support
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*
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* Copyright (c) 2008 yajin (yajin@vm-kernel.org)
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* Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
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* Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
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* This code is licensed under the GNU GPL v2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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/*
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* Fuloong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
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* https://www.linux-mips.org/wiki/Fuloong_2E
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*
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* Loongson 2e manuals:
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* https://github.com/loongson-community/docs/tree/master/2E
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "qemu/datadir.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "hw/clock.h"
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#include "hw/intc/i8259.h"
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#include "hw/dma/i8257.h"
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#include "hw/isa/superio.h"
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#include "net/net.h"
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#include "hw/boards.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/block/flash.h"
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#include "hw/mips/mips.h"
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#include "hw/mips/cpudevs.h"
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#include "hw/pci/pci.h"
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#include "qemu/log.h"
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#include "hw/loader.h"
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#include "hw/ide/pci.h"
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#include "elf.h"
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#include "hw/isa/vt82c686.h"
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#include "hw/rtc/mc146818rtc.h"
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#include "hw/timer/i8254.h"
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#include "exec/address-spaces.h"
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#include "sysemu/qtest.h"
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#include "sysemu/reset.h"
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#include "qemu/error-report.h"
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#define ENVP_PADDR 0x2000
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#define ENVP_VADDR cpu_mips_phys_to_kseg0(NULL, ENVP_PADDR)
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#define ENVP_NB_ENTRIES 16
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#define ENVP_ENTRY_SIZE 256
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/* Fuloong 2e has a 512k flash: Winbond W39L040AP70Z */
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#define BIOS_SIZE (512 * KiB)
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#define MAX_IDE_BUS 2
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/*
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* PMON is not part of qemu and released with BSD license, anyone
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* who want to build a pmon binary please first git-clone the source
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* from the git repository at:
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* https://github.com/loongson-community/pmon
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*/
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#define FULOONG_BIOSNAME "pmon_2e.bin"
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/* PCI SLOT in Fuloong 2e */
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#define FULOONG2E_VIA_SLOT 5
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#define FULOONG2E_ATI_SLOT 6
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#define FULOONG2E_RTL8139_SLOT 7
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static struct _loaderparams {
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int ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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} loaderparams;
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static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
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const char *string, ...)
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{
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va_list ap;
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int32_t table_addr;
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if (index >= ENVP_NB_ENTRIES) {
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return;
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}
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if (string == NULL) {
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prom_buf[index] = 0;
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return;
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}
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table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
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prom_buf[index] = tswap32(ENVP_VADDR + table_addr);
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va_start(ap, string);
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vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
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va_end(ap);
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}
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static uint64_t load_kernel(CPUMIPSState *env)
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{
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uint64_t kernel_entry, kernel_high, initrd_size;
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int index = 0;
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long kernel_size;
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ram_addr_t initrd_offset;
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uint32_t *prom_buf;
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long prom_size;
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kernel_size = load_elf(loaderparams.kernel_filename, NULL,
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cpu_mips_kseg0_to_phys, NULL,
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&kernel_entry, NULL,
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&kernel_high, NULL,
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0, EM_MIPS, 1, 0);
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if (kernel_size < 0) {
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error_report("could not load kernel '%s': %s",
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loaderparams.kernel_filename,
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load_elf_strerror(kernel_size));
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exit(1);
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}
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/* load initrd */
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initrd_size = 0;
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initrd_offset = 0;
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if (loaderparams.initrd_filename) {
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initrd_size = get_image_size(loaderparams.initrd_filename);
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if (initrd_size > 0) {
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initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
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if (initrd_offset + initrd_size > loaderparams.ram_size) {
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error_report("memory too small for initial ram disk '%s'",
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loaderparams.initrd_filename);
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exit(1);
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}
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initrd_size = load_image_targphys(loaderparams.initrd_filename,
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initrd_offset,
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loaderparams.ram_size - initrd_offset);
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}
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if (initrd_size == (target_ulong) -1) {
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error_report("could not load initial ram disk '%s'",
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loaderparams.initrd_filename);
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exit(1);
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}
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}
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/* Setup prom parameters. */
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prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
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prom_buf = g_malloc(prom_size);
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prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
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if (initrd_size > 0) {
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prom_set(prom_buf, index++,
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"rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
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cpu_mips_phys_to_kseg0(NULL, initrd_offset),
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initrd_size, loaderparams.kernel_cmdline);
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} else {
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prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
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}
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/* Setup minimum environment variables */
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prom_set(prom_buf, index++, "busclock=33000000");
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prom_set(prom_buf, index++, "cpuclock=100000000");
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prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
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prom_set(prom_buf, index++, "modetty0=38400n8r");
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prom_set(prom_buf, index++, NULL);
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rom_add_blob_fixed("prom", prom_buf, prom_size, ENVP_PADDR);
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g_free(prom_buf);
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return kernel_entry;
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}
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static void write_bootloader(CPUMIPSState *env, uint8_t *base,
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uint64_t kernel_addr)
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{
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uint32_t *p;
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/* Small bootloader */
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p = (uint32_t *)base;
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/* j 0x1fc00040 */
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stl_p(p++, 0x0bf00010);
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/* nop */
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stl_p(p++, 0x00000000);
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/* Second part of the bootloader */
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p = (uint32_t *)(base + 0x040);
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/* lui a0, 0 */
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stl_p(p++, 0x3c040000);
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/* ori a0, a0, 2 */
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stl_p(p++, 0x34840002);
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/* lui a1, high(ENVP_VADDR) */
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stl_p(p++, 0x3c050000 | ((ENVP_VADDR >> 16) & 0xffff));
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/* ori a1, a0, low(ENVP_VADDR) */
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stl_p(p++, 0x34a50000 | (ENVP_VADDR & 0xffff));
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/* lui a2, high(ENVP_VADDR + 8) */
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stl_p(p++, 0x3c060000 | (((ENVP_VADDR + 8) >> 16) & 0xffff));
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/* ori a2, a2, low(ENVP_VADDR + 8) */
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stl_p(p++, 0x34c60000 | ((ENVP_VADDR + 8) & 0xffff));
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/* lui a3, high(env->ram_size) */
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stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
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/* ori a3, a3, low(env->ram_size) */
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stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));
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/* lui ra, high(kernel_addr) */
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stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));
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/* ori ra, ra, low(kernel_addr) */
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stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));
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/* jr ra */
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stl_p(p++, 0x03e00008);
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/* nop */
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stl_p(p++, 0x00000000);
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}
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static void main_cpu_reset(void *opaque)
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{
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MIPSCPU *cpu = opaque;
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CPUMIPSState *env = &cpu->env;
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cpu_reset(CPU(cpu));
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/* TODO: 2E reset stuff */
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if (loaderparams.kernel_filename) {
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env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
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}
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}
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static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
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I2CBus **i2c_bus, ISABus **p_isa_bus)
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{
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qemu_irq *i8259;
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ISABus *isa_bus;
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PCIDevice *dev;
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dev = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), true,
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TYPE_VT82C686B_ISA);
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isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(dev), "isa.0"));
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assert(isa_bus);
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*p_isa_bus = isa_bus;
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/* Interrupt controller */
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/* The 8259 -> IP5 */
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i8259 = i8259_init(isa_bus, intc);
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isa_bus_irqs(isa_bus, i8259);
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/* init other devices */
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i8254_pit_init(isa_bus, 0x40, 0, NULL);
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i8257_dma_init(isa_bus, 0);
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/* Super I/O */
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isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
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dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
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pci_ide_create_devs(dev);
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pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
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pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
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dev = pci_new(PCI_DEVFN(slot, 4), TYPE_VT82C686B_PM);
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qdev_prop_set_uint32(DEVICE(dev), "smb_io_base", 0xeee1);
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pci_realize_and_unref(dev, pci_bus, &error_fatal);
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*i2c_bus = I2C_BUS(qdev_get_child_bus(DEVICE(dev), "i2c"));
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/* Audio support */
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pci_create_simple(pci_bus, PCI_DEVFN(slot, 5), TYPE_VIA_AC97);
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pci_create_simple(pci_bus, PCI_DEVFN(slot, 6), TYPE_VIA_MC97);
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}
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/* Network support */
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static void network_init(PCIBus *pci_bus)
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{
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int i;
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for (i = 0; i < nb_nics; i++) {
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NICInfo *nd = &nd_table[i];
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const char *default_devaddr = NULL;
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if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
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/* The Fuloong board has a RTL8139 card using PCI SLOT 7 */
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default_devaddr = "07";
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}
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pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
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}
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}
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static void mips_fuloong2e_init(MachineState *machine)
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{
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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char *filename;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *bios = g_new(MemoryRegion, 1);
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long bios_size;
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uint8_t *spd_data;
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uint64_t kernel_entry;
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PCIDevice *pci_dev;
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PCIBus *pci_bus;
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ISABus *isa_bus;
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I2CBus *smbus;
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Clock *cpuclk;
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MIPSCPU *cpu;
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CPUMIPSState *env;
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DeviceState *dev;
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cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
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clock_set_hz(cpuclk, 533080000); /* ~533 MHz */
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/* init CPUs */
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cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
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env = &cpu->env;
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qemu_register_reset(main_cpu_reset, cpu);
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/* TODO: support more than 256M RAM as highmem */
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if (machine->ram_size != 256 * MiB) {
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error_report("Invalid RAM size, should be 256MB");
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exit(EXIT_FAILURE);
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}
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memory_region_add_subregion(address_space_mem, 0, machine->ram);
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/* Boot ROM */
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memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
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&error_fatal);
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memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
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/*
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* We do not support flash operation, just loading pmon.bin as raw BIOS.
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* Please use -L to set the BIOS path and -bios to set bios name.
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*/
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if (kernel_filename) {
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loaderparams.ram_size = machine->ram_size;
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loaderparams.kernel_filename = kernel_filename;
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loaderparams.kernel_cmdline = kernel_cmdline;
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loaderparams.initrd_filename = initrd_filename;
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kernel_entry = load_kernel(env);
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write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
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} else {
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
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machine->firmware ?: FULOONG_BIOSNAME);
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if (filename) {
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bios_size = load_image_targphys(filename, 0x1fc00000LL,
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BIOS_SIZE);
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g_free(filename);
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} else {
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bios_size = -1;
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}
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if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
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machine->firmware && !qtest_enabled()) {
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error_report("Could not load MIPS bios '%s'", machine->firmware);
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exit(1);
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}
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}
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/* Init internal devices */
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cpu_mips_irq_init_cpu(cpu);
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cpu_mips_clock_init(cpu);
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/* North bridge, Bonito --> IP2 */
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pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
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/* South bridge -> IP5 */
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vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
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&smbus, &isa_bus);
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/* GPU */
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if (vga_interface_type != VGA_NONE) {
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pci_dev = pci_new(-1, "ati-vga");
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dev = DEVICE(pci_dev);
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qdev_prop_set_uint32(dev, "vgamem_mb", 16);
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qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
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pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
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}
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/* Populate SPD eeprom data */
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spd_data = spd_data_generate(DDR, machine->ram_size);
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smbus_eeprom_init_one(smbus, 0x50, spd_data);
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mc146818_rtc_init(isa_bus, 2000, NULL);
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/* Network card: RTL8139D */
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network_init(pci_bus);
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}
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static void mips_fuloong2e_machine_init(MachineClass *mc)
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{
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mc->desc = "Fuloong 2e mini pc";
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mc->alias = "fulong2e"; /* Incorrect name used up to QEMU 4.2 */
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mc->init = mips_fuloong2e_init;
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mc->block_default_type = IF_IDE;
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mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
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mc->default_ram_size = 256 * MiB;
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mc->default_ram_id = "fuloong2e.ram";
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mc->minimum_page_bits = 14;
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}
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DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
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