See ISA, 4.4.3 for details. Vector addresses recorded in core configuration are absolute values that correspond to default VECBASE value. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
247 lines
7.8 KiB
C
247 lines
7.8 KiB
C
/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu.h"
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#include "exec-all.h"
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#include "gdbstub.h"
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#include "qemu-common.h"
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#include "host-utils.h"
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#if !defined(CONFIG_USER_ONLY)
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#include "hw/loader.h"
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#endif
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void cpu_reset(CPUXtensaState *env)
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{
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env->exception_taken = 0;
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env->pc = env->config->exception_vector[EXC_RESET];
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env->sregs[LITBASE] &= ~1;
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env->sregs[PS] = xtensa_option_enabled(env->config,
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XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
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env->sregs[VECBASE] = env->config->vecbase;
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env->pending_irq_level = 0;
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}
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static const XtensaConfig core_config[] = {
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{
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.name = "sample-xtensa-core",
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.options = -1 ^
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(XTENSA_OPTION_BIT(XTENSA_OPTION_HW_ALIGNMENT) |
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XTENSA_OPTION_BIT(XTENSA_OPTION_MMU)),
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.nareg = 64,
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.ndepc = 1,
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.excm_level = 16,
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.vecbase = 0x5fff8400,
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.exception_vector = {
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[EXC_RESET] = 0x5fff8000,
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[EXC_WINDOW_OVERFLOW4] = 0x5fff8400,
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[EXC_WINDOW_UNDERFLOW4] = 0x5fff8440,
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[EXC_WINDOW_OVERFLOW8] = 0x5fff8480,
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[EXC_WINDOW_UNDERFLOW8] = 0x5fff84c0,
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[EXC_WINDOW_OVERFLOW12] = 0x5fff8500,
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[EXC_WINDOW_UNDERFLOW12] = 0x5fff8540,
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[EXC_KERNEL] = 0x5fff861c,
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[EXC_USER] = 0x5fff863c,
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[EXC_DOUBLE] = 0x5fff865c,
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},
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.ninterrupt = 13,
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.nlevel = 6,
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.interrupt_vector = {
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0,
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0,
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0x5fff857c,
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0x5fff859c,
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0x5fff85bc,
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0x5fff85dc,
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0x5fff85fc,
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},
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.level_mask = {
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[4] = 1,
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},
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.interrupt = {
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[0] = {
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.level = 4,
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.inttype = INTTYPE_TIMER,
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},
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},
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.nccompare = 1,
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.timerint = {
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[0] = 0,
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},
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.clock_freq_khz = 912000,
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},
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};
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CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
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{
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static int tcg_inited;
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CPUXtensaState *env;
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const XtensaConfig *config = NULL;
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int i;
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for (i = 0; i < ARRAY_SIZE(core_config); ++i)
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if (strcmp(core_config[i].name, cpu_model) == 0) {
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config = core_config + i;
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break;
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}
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if (config == NULL) {
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return NULL;
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}
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env = g_malloc0(sizeof(*env));
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env->config = config;
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cpu_exec_init(env);
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if (!tcg_inited) {
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tcg_inited = 1;
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xtensa_translate_init();
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}
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xtensa_irq_init(env);
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qemu_init_vcpu(env);
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return env;
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}
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void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf)
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{
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int i;
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cpu_fprintf(f, "Available CPUs:\n");
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for (i = 0; i < ARRAY_SIZE(core_config); ++i) {
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cpu_fprintf(f, " %s\n", core_config[i].name);
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}
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}
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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return addr;
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}
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static uint32_t relocated_vector(CPUState *env, uint32_t vector)
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{
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if (xtensa_option_enabled(env->config,
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XTENSA_OPTION_RELOCATABLE_VECTOR)) {
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return vector - env->config->vecbase + env->sregs[VECBASE];
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} else {
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return vector;
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}
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}
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/*!
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* Handle penging IRQ.
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* For the high priority interrupt jump to the corresponding interrupt vector.
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* For the level-1 interrupt convert it to either user, kernel or double
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* exception with the 'level-1 interrupt' exception cause.
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*/
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static void handle_interrupt(CPUState *env)
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{
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int level = env->pending_irq_level;
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if (level > xtensa_get_cintlevel(env) &&
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level <= env->config->nlevel &&
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(env->config->level_mask[level] &
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env->sregs[INTSET] &
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env->sregs[INTENABLE])) {
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if (level > 1) {
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env->sregs[EPC1 + level - 1] = env->pc;
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env->sregs[EPS2 + level - 2] = env->sregs[PS];
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env->sregs[PS] =
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(env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM;
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env->pc = relocated_vector(env,
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env->config->interrupt_vector[level]);
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} else {
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env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
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if (env->sregs[PS] & PS_EXCM) {
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if (env->config->ndepc) {
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env->sregs[DEPC] = env->pc;
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} else {
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env->sregs[EPC1] = env->pc;
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}
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env->exception_index = EXC_DOUBLE;
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} else {
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env->sregs[EPC1] = env->pc;
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env->exception_index =
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(env->sregs[PS] & PS_UM) ? EXC_USER : EXC_KERNEL;
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}
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env->sregs[PS] |= PS_EXCM;
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}
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env->exception_taken = 1;
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}
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}
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void do_interrupt(CPUState *env)
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{
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if (env->exception_index == EXC_IRQ) {
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qemu_log_mask(CPU_LOG_INT,
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"%s(EXC_IRQ) level = %d, cintlevel = %d, "
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"pc = %08x, a0 = %08x, ps = %08x, "
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"intset = %08x, intenable = %08x, "
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"ccount = %08x\n",
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__func__, env->pending_irq_level, xtensa_get_cintlevel(env),
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env->pc, env->regs[0], env->sregs[PS],
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env->sregs[INTSET], env->sregs[INTENABLE],
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env->sregs[CCOUNT]);
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handle_interrupt(env);
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}
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switch (env->exception_index) {
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case EXC_WINDOW_OVERFLOW4:
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case EXC_WINDOW_UNDERFLOW4:
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case EXC_WINDOW_OVERFLOW8:
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case EXC_WINDOW_UNDERFLOW8:
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case EXC_WINDOW_OVERFLOW12:
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case EXC_WINDOW_UNDERFLOW12:
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case EXC_KERNEL:
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case EXC_USER:
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case EXC_DOUBLE:
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qemu_log_mask(CPU_LOG_INT, "%s(%d) "
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"pc = %08x, a0 = %08x, ps = %08x, ccount = %08x\n",
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__func__, env->exception_index,
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env->pc, env->regs[0], env->sregs[PS], env->sregs[CCOUNT]);
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if (env->config->exception_vector[env->exception_index]) {
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env->pc = relocated_vector(env,
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env->config->exception_vector[env->exception_index]);
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env->exception_taken = 1;
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} else {
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qemu_log("%s(pc = %08x) bad exception_index: %d\n",
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__func__, env->pc, env->exception_index);
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}
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break;
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case EXC_IRQ:
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break;
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default:
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qemu_log("%s(pc = %08x) unknown exception_index: %d\n",
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__func__, env->pc, env->exception_index);
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break;
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}
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check_interrupts(env);
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}
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